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GATE EC Analog Circuits questions

Practise Analog Circuits questions for GATE EC. Explore official PYQs and original subject-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2024Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
An NMOS\text{NMOS} transistor operating in the linear region has IDSI_{D S} of 5μA5 \mu \mathrm{A} at VDSV_{D S} of 0.1 V0.1 \mathrm{~V}. Keeping VGSV_{G S} constant, the VDSV_{D S} is increased to 1.5 V1.5 \mathrm{~V}. Given that μnCoxWL=50μA/V2\mu_{n} C_{o x} \frac{W}{L}=50 \mu \mathrm{A} / \mathrm{V}^{2}, the transconductance at the new operating point (in …
Official PYQ2023Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
In the circuit shown below, V1\text{V}_1 and V2\text{V}_2 are bias voltages. Based on input and output impedances, the circuit behaves as a
Official PYQ2023Analog CircuitsOp-amp CircuitsMCQ · 2 marks
The VOUT VIN \frac{V_{\text{OUT }}}{V_{\text{IN }}} of the circuit shown below is
Official PYQ2023Analog CircuitsDiode CircuitsMCQ · 2 marks
In the circuit shown below, D1D_1 and D2D_2 are silicon diodes with cut-in voltage of 0.7 V0.7 \mathrm{~V}. VIN\mathrm{V}_{\mathrm{IN}} and VOUT\mathrm{V}_{\mathrm{OUT}} are input and output voltages in volts. The transfer characteristic is
Official PYQ2022Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
Consider the CMOS\text{CMOS} circuit shown in the figure (substrates are connected to their respective sources). The gate width (W)(W) to gate length (L)(L) ratios (WL)\left( \frac{W}{L} \right) of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the pMOSFET,p\text{MOSFET}, the threshold voltage is …
Official PYQ2022Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
The ideal long channel nMOSFETn\text{MOSFET} and pMOSFETp\text{MOSFET} devices shown in the circuits have threshold voltages of 1  V1 \; \text{V} and –1  V,– 1 \; \text{V}, respectively. The MOSFET\text{MOSFET} substrates are connected to their respective sources. Ignore leakage currents and assume that the capacitors are initially discharged. For the applied voltages …
Official PYQ2022Analog CircuitsOp-amp CircuitsMSQ · 1 mark
An ideal OPAMP\text{OPAMP} circuit with a sinusoidal input is shown in the figure. The 3  dB3 \; \text{dB} frequency is the frequency at which the magnitude of the voltage gain decreases by 3  dB3 \; \text{dB} from the maximum value. Which of the options is/are correct?
Official PYQ2022Analog CircuitsBJT and MOSFET AmplifiersNAT · 1 mark
An ideal MOS\text{MOS} capacitor (p-type semiconductor) is shown in the figure. The MOS\text{MOS} capacitor is under strong inversion with VG=2  V.V_{G} = 2 \; \text{V}. The corresponding inversion charge density (QIN)(Q_{IN}) is 2.2  μC /cm2.2.2 \; \mu \text{C /cm}^{2}. Assume oxide capacitance per unit area as Cox=1.7  μF/cm2.C_{\text{ox}} = 1.7 \; \mu \text{F/cm}^{2}. For …
Official PYQ2022Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
Consider an ideal long channel nMOSFETn \text{MOSFET} (enhancement-mode) with gate length 10  μm10 \; \mu \text{m} and width 100  μm.100 \; \mu \text{m}. The product of electron mobility (μn)(\mu_{n}) and oxide capacitance per unit area (Cox)(C_{\text{ox}}) is μnCox=1  mA/V2.\mu_{n} C_{\text{ox}} = 1 \; \text{mA/V}^{2}. The threshold voltage of the transistor is …
Official PYQ2022Analog CircuitsOp-amp CircuitsMCQ · 2 marks
For the following circuit with an ideal OPAMP,\text{OPAMP}, the difference between the maximum and the minimum values of the capacitor voltage (Vc)(V_{c}) is ____________.
Official PYQ2022Analog CircuitsOp-amp CircuitsMCQ · 2 marks
A circuit with an ideal OPAMP\text{OPAMP} is shown. The Bode plot for the magnitude (in dB)\text{(in dB)} of the gain transfer function (AV(jω)=Vout(jω)/Vin(jω))(A_{V} (j \omega) = V_{\text{out}} (j \omega) / V_{\text{in}} (j \omega)) of the circuuit is also provided (here, ω\omega is the angular frequency in rad/s.\text{rad/s}.) The values of RR and CC are ________________.
Official PYQ2022Analog CircuitsDiode CircuitsNAT · 2 marks
A circuit and the characteristics of the diode (D)\text{(D)} in it are shown. The ratio of the minimum to the maximum small signal voltage gain ∂Vout∂Vin\frac{\partial V_{\text{out}}}{\partial V_{\text{in}}} is ____________ (rounded off to two decimal places).
Official PYQ2022Analog CircuitsOp-amp CircuitsNAT · 2 marks
Consider the circuit shown with an ideal OPAMP.\text{OPAMP}. The output voltage V0V_{0} is ____________ VV (rounded off to two decimal places).
Official PYQ2022Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
Consider the circuit shown with an ideal long channel nMOSFETn \text{MOSFET} (enhancement-mode, substrate is connected to the source). The transistor is appropriately biased in the saturation region with VGGV_{GG} and VDDV_{DD} such that it acts as a linear amplifier. viv_{i} is the small-signal ac input voltage. vAv_{A} and vBv_{B} represent the …
Official PYQ2021Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
​​​​​​​In the circuit shown in the figure, the transistors M1M_{1} and M2M_{2} are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the MOSFETs\text{MOSFETs} M1M_{1} and M2M_{2} are gm1g_{m1} and gm2g_{m2}, respectively, and the internal resistance of the …
Official PYQ2021Analog CircuitsOp-amp CircuitsMCQ · 1 mark
For the circuit with an ideal OPAMP\text{OPAMP} shown in the figure. VREFV_{\text{REF}} is fixed. If VOUT=1V_{\text{OUT}}=1 volt for VIN−0.1V_{\text{IN}}-0.1 volt and VOUT=6V_{\text{OUT}}=6 volt for VIN=1V_{\text{IN}}=1 volt, where VOUTV_{\text{OUT}} is measured across RLR_{L} connected at the output of this OPAMP\text{OPAMP}, the value of RF/RINR_{F}/R_{\text{IN}} is
Official PYQ2021Analog CircuitsOp-amp CircuitsMCQ · 1 mark
Consider the circuit with an ideal OPAMP\text{OPAMP} shown in the figure. Assuming ∣VIN∣≪∣VCC∣\left | V_{\text{IN}} \right |\ll \left | V_{\text{CC}} \right | and ∣VREF∣≪∣VCC∣\left | V_{\text{REF}} \right |\ll \left | V_{\text{CC}} \right |, the condition at which VOUTV_{\text{OUT}} equals to zero is
Official PYQ2021Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
For an nn-channel silicon MOSFET\text{MOSFET} with 10 nm10\:nm gate oxide thickness, the substrate sensitivity (∂VT/∂∣VBS∣)\left ( \partial V_{T}/\partial \left | V_{BS} \right | \right ) is found to be 50 mV/V50\:mV/V at a substrate voltage ∣VBS∣=2V\left | V_{BS} \right |=2V, where VTV_{T} is the threshold voltage of the MOSFET\text{MOSFET}. Assume that, …
Official PYQ2021Analog CircuitsDiode CircuitsNAT · 2 marks
An asymmetrical periodic pulse train vinv_{in} of 10 V10\:V amplitude with on-time TON=1 msT_{\text{ON}}=1\:ms and off-time TOFF=1 μsT_{\text{OFF}}=1\:\mu s is applied to the circuit shown in the figure. The diode D1D_{1} is ideal. The difference between the maximum voltage and minimum voltage of the output waveform vov_{o} (in integer) is ______________ VV.
Official PYQ2021Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
For the transistor M1M_{1} in the circuit shown in the figure, μnCox=100 μA/V2\mu_{n} C_{\text{ox}} = 100\:\mu A/V^{2} and (W/L)=10(W/L)=10, where μn\mu_{n} is the mobility of electron, CoxC_{\text{ox}} is the oxide capacitance per unit area , WW is the width and LL is the length. The channel length modulation coefficient is ignored. If the gate-to-source …