GATE CS Digital Logic questions

Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is $10\;\text{ns}$. Also, assume that the setup time for the $JK$ inputs of the flip flops is negligible.

Advantage of synchronous sequential circuits over asynchronous ones is:

Consider the number given by the decimal expression: $$16^3*9 + 16^2*7 + 16*5+3$$ The number of $1’s$ in the unsigned binary representation of the number is ______

State whether the following statements are TRUE or FALSE with reason: RAM is a combinational circuit and PLA is a sequential circuit.

Choose the correct alternatives (More than one may be correct). Two NAND gates having open collector outputs are tied together as shown in below figure. The logic function $Y,$ implemented by the circuit is,

Define the value of $r$ in the following: $\sqrt {(41)_{r}} = (7)_{10}$

A Boolean function $f$ is to be realized only by $\text{NOR}$ gates. Its $K$-map is given below: The realization is

The below figure shows four $\text{D}$-type flip-flops connected as a shift register using a $\text{XOR}$ gate. The initial state and three subsequent states for three clock pulses are also given. …

The Boolean expression $A \oplus B \oplus A$ is equivalent to

The exponent of a floating-point number is represented in excess-$\text{N}$ code so that:

The output $F$ of the below multiplexer circuit can be represented by

The total number of Boolean functions which can be realised with four variables is:

The above circuit produces the output sequence: