The below figure shows four -type flip-flops connected as a shift register using a gate. The initial state and three subsequent states for three clock pulses are also given.

The state after the fourth clock pulse is
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Answer: D
From the given state transitions, we can observe that the circuit is a right-shift register where the bits shift from left to right on each clock pulse:
The input to the first flip-flop is fed by the output of the gate. Let us determine the inputs to this gate by analyzing the transitions of :
- Initial State (): Next value of is .
- After 1st clock (): Next value of is .
- After 2nd clock (): Next value of is .
An gate connected to and perfectly satisfies these conditions:
- At Initial ():
- After 1st clock ():
- After 2nd clock ():
Now, we can find the state after the 4th clock pulse using the state after the 3rd clock ():
Thus, the state after the fourth clock pulse is .
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