GATE EC Digital Circuits questions
Practise Digital Circuits questions for GATE EC. Explore official PYQs and original subject-wise quizzes, check answers and view available solutions. Free, no sign-in.
Subject, topic, year and type filter the full library. Match any choice within a filter, and all selected filter categories. Search, source and sort apply to this page.
20 on this page
The following FIVE instructions were executed on an microprocessor. MVI A, H MVI B, H ADD B CMA ANI H The Accumulator value immediately after the execution of the fifth instruction is
A finite state machine (FSM) is implemented using the D flip-flop A and B, and logic gates, as shown in the figure below. The four possible states of the FSM are and . Assume that is held at a constant logic level throughout the operation of the FSM. When the FSM is initialized to the state and …
For the circuit shown in the figure, P and Q are the inputs and Y is the output. The logic implemented by the circuit is
Consider the circuit shown in the figure. The Boolean expression implemented by the circuit is
In a DRAM,
The state diagram of a finite state machine (FSM) designed to detect an overlapping sequence of three bits is shown in the figure. The FSM has an input 'In' and an output 'Out'. The initial state of the FSM is . If the input sequence is , starting with the left-most bit, then the number of times 'Out' will be is ____________
Figure Ⅰ shows a -bit ripple carry adder realized using full adders and Figure Ⅱ shows the circuit of a full-adder (FA). The propagation delay of the XOR, AND and OR gates in Figure Ⅱ are ns, ns and ns, respectively. Assume all the inputs to the -bit adder are initially reset to . Figure I Figure II At , the …
A programmable logic array (PLA) is shown in the figure. The Boolean function implemented is
A small percentage of impurity is added to an intrinsic semiconductor at . Which one of the following statements is true for the energy band diagram shown in the following figure?
Consider the following statements for a metal oxide semiconductor field effect transistor (MOSFET): Which of the above statements are INCORRECT? P and Q P and S Q and R R and S
The functionality implemented by the circuit below is
In an system, a PUSH operation requires more clock cycles than a POP operation. Which one of the following options is the correct reason for this?
Assume that all the digital gates in the circuit shown in the figure are ideal, the resistor and the supply voltage is . The flip-flops and are initialized with logic values and , respectively. The clocks has a duty cycle. The average power dissipated (in …
A multiplexer is to be used for generating the output carry of a full adder. and are the bits to be added while is the input carry and is the output carry. and are to be used as the select bits with being the more significant select bit. Which one of the following statements correctly describes the …
An Kbyte ROM with an active low Chip Select input is to be used in an microprocessor based system. The ROM should occupy the address range to . The address lines are designated as to , where is the most significant address bit. Which one of the following logic …
In an bit flash ADC, the analog voltage is fed simultaneously to comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source (whose output is being converted to digital format) has a source resistance of as shown in the circuit …
The state transition diagram for a finite state machine with states , and , and binary inputs , and , is shown in the figure. Which one of the following statements is correct?
The characteristics of three types of diodes at the room temperature, made of semiconductors and , are shown in the figure. Assume that the diodes are uniformly doped and identical in all respects except their materials. If , and are the band gaps of and , respectively, then
In an microprocessor, the contents of the accumulator and the carry flag are (in hex) and , respectively. If the instruction is executed, then the contents of the accumulator (in hex) and the carry flag, respectively, will be
The logic functionality realized by the circuit shown below is
