GATE EC 2016 Set 2 Q43 — Data Converters

In an $N$ bit flash ADC, the analog voltage is fed simultaneously to $2^{N}-1$  comparators. The output of the comparators is then encoded to a binary format using digital circuits. Assume that the analog voltage source $V_{in}$ (whose output is being converted to digital format) has a source resistance of $75 \: \Omega$ as shown in the circuit diagram below and the input capacitance of each comparator is $8 \: pF$. The input must settle to an accuracy of $1/2$ LSB even for a full scale input change for proper conversion. Assume that the time taken by the thermometer to binary encoder is negligible.

If the flash ADC has $8$ bit resolution, which one of the following alternatives is closed to the maximum sampling rate?