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Official PYQ · 2023

GATE EC 2023 Set 1 Q52 — Data Converters

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A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of 1  μs1 \; \mu \mathrm{s}. The time for the sampling switch to stay closed to charge a capacitor adequately to a full scale voltage of 1 V1 \mathrm{~V} with 1212-bit accuracy is ___________ μs\mu \mathrm{s} (rounded off to two decimal places).

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Answer: 8.30:8.34

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