GATE CS 1987 Q2b — I/O Interface: Interrupt and DMA Mode

The given statement is TRUE (represented as 1).

Explanation:

In a microprocessor system, the speed of data transfer depends on the number of clock cycles (T-states) required to execute the transfer instructions:

1. Memory-Mapped I/O (MMIO):
   • I/O devices are mapped into the same address space as memory.
   • Any memory-reference instruction (such as MOV, LDR/STR, or LDA/STA) can be used for data transfer.
   • For example, in the 8085 microprocessor, the memory-register transfer instruction MOV M, r takes only 7 T-states (2 machine cycles).
2. I/O-Mapped I/O (IOMIO):
   • I/O devices have a separate address space.
   • Special instructions like IN and OUT must be used.
   • In the 8085 microprocessor, IN and OUT instructions require 10 T-states (3 machine cycles) to execute.

Since memory-access instructions generally require fewer clock cycles than dedicated I/O instructions, and because MMIO allows a richer set of instructions (including direct arithmetic and logical operations on I/O registers), data transfer is usually faster in a Memory-Mapped I/O scheme.