GATE CS 2024 Set 1 Q5 — I/O Interface: Interrupt and DMA Mode

To identify the false statement, let us analyze each option:

• Option A (True): In the cycle stealing mode of DMA, the DMA controller requests the system bus to transfer a single word of data. Once the transfer is complete, control of the bus is returned to the CPU. This process is repeated for subsequent words, "stealing" one bus cycle at a time.
• Option B (True): In burst mode, the DMA controller retains control of the bus until the entire block of data is transferred. Since there is no overhead of repeatedly requesting and releasing the bus for every single word, burst mode achieves a much higher throughput for bulk data transfers compared to cycle stealing.
• Option C (False): In programmed I/O, the CPU must continuously poll the device status register in a busy-wait loop until the device is ready. This wastes a significant number of CPU cycles. In contrast, interrupt-driven I/O allows the CPU to execute other useful processes and only handles I/O when an interrupt is received. Thus, interrupt-driven I/O has much better CPU utilization than programmed I/O.
• Option D (True): With vectored interrupts, the interrupting device directly provides the interrupt vector address to the CPU, allowing it to branch directly to the Interrupt Service Routine (ISR). In non-vectored interrupts, the CPU must poll multiple devices to identify the source of the interrupt, which introduces additional latency. Hence, vectored interrupts start executing the ISR faster.

Therefore, the false statement is C.