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Official PYQ · 2025

GATE CS 2025 Set 1 Q1 — I/O Interface: Interrupt and DMA Mode

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Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:

  1. The processor saves the content of the program counter.
  2. The program counter is loaded with the start address of the ISR.
  3. The processor finishes the present instruction.

Which ONE of the following is the CORRECT sequence of steps?

Choose one option
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Answer: A

When an asynchronous interrupt request is received by the processor, the following sequence of steps is performed to handle it:

  1. Step (iii) - Finish the present instruction: The processor does not halt execution mid-instruction. It completes the execution of the currently running instruction before checking for and responding to pending interrupts.
  2. Step (i) - Save the Program Counter (PC): Before branching to the Interrupt Service Routine (ISR), the processor must save the return address (the current content of the PC, which points to the next instruction of the main program) onto the stack or a dedicated register, so that it can resume the main program later.
  3. Step (ii) - Load PC with ISR address: Once the return address is safely stored, the PC is loaded with the starting address of the ISR to begin its execution.

Therefore, the correct sequence of steps is (iii), (i), (ii), which corresponds to Option A.

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