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Official PYQ · 1987

GATE CS 1987 Q1-viii — I/O Interface: Interrupt and DMA Mode

Explain with AI

On receiving an interrupt from a I/O device the CPU:

Choose one option
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Answer: D

When an I/O device raises an interrupt, the CPU does not suspend its operation immediately in the middle of an instruction. Doing so would leave the processor in an inconsistent state, making it difficult to resume the program accurately.

Instead, the CPU completes the execution of the current instruction, checks the interrupt signal at the end of the instruction cycle, saves the current state (like the Program Counter), and then branches to the Interrupt Service Routine (ISR).

Option Analysis:

  • A: Incorrect. The CPU does not halt; it services the interrupt.
  • B: Incorrect. Handing over bus control is done during Direct Memory Access (DMA), not standard interrupt handling.
  • C: Incorrect. Branching immediately mid-instruction is avoided to prevent state inconsistency.
  • D: Correct. The CPU branches to the ISR after completing the current instruction.

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