Skip to content
Official PYQ · 2007

GATE CS 2007 Q73 — I/O Interface: Interrupt and DMA Mode

Explain with AI

Consider the following program segment. Here R1, R2\text{R1, R2} and R3\text{R3} are the general purpose registers.

InstructionOperation Instruction Size(no. of words)MOV R1,(3000)R1←M[3000]2LOOP:MOV R2,(R3)R2←M[R3]1ADD R2,R1R2←R1 + R21MOV (R3),R2M[R3]←R21INC R3R3←R3 + 11DEC R1R1←R1 – 11BNZ LOOPBranch on not zero2HALTStop1\begin{array}{|l|l|l|c|} \hline & \text{Instruction} & \text{Operation }& \text{Instruction Size} \\ & & & \text{(no. of words)}\\ \hline & \text{MOV R1,(3000)} & \text{R1} \leftarrow \text{M[3000]} & \text{$2$} \\ \hline \text{LOOP:}& \text{MOV R2,(R3)} & \text{R2} \leftarrow \text{M[R3]} & \text{$1$} \\ \hline & \text{ADD R2,R1} & \text{R2} \leftarrow \text{R1 + R2} & \text{$1$} \\ \hline & \text{MOV (R3),R2} & \text{M[R3]} \leftarrow \text{R2} & \text{$1$} \\ \hline& \text{INC R3} &\text{R3} \leftarrow \text{R3 + 1} & \text{$1$} \\ \hline & \text{DEC R1} &\text{R1} \leftarrow \text{R1 – 1} & \text{$1$} \\ \hline& \text{BNZ LOOP} & \text{Branch on not zero} & \text{$2$} \\ \hline & \text{HALT} & \text{Stop} & \text{$1$} \\ \hline\end{array}

Assume that the content of memory location 30003000 is 1010 and the content of the register R3\text{R3} is 2000.2000. The content of each of the memory locations from 20002000 to 20102010 is 100.100. The program is loaded from the memory location 1000.1000. All the numbers are in decimal.

Assume that the memory is byte addressable and the word size is 3232 bits. If an interrupt occurs during the execution  of the instruction “INC R3”, what return address will be pushed on to the stack?

Choose one option
View worked solution

Answer: C

Since the memory is byte-addressable and the word size is 32 bits=4 bytes32\text{ bits} = 4\text{ bytes}, each word occupies 44 bytes of memory. We can calculate the starting memory address of each instruction starting from location 10001000:

Instruction Size (words) Size (bytes) Memory Address Range
MOV R1,(3000) 2 2×4=82 \times 4 = 8 10001000 to 10071007
LOOP: MOV R2,(R3) 1 1×4=41 \times 4 = 4 10081008 to 10111011
ADD R2,R1 1 1×4=41 \times 4 = 4 10121012 to 10151015
MOV (R3),R2 1 1×4=41 \times 4 = 4 10161016 to 10191019
INC R3 1 1×4=41 \times 4 = 4 10201020 to 10231023
DEC R1 1 1×4=41 \times 4 = 4 10241024 to 10271027
BNZ LOOP 2 2×4=82 \times 4 = 8 10281028 to 10351035
HALT 1 1×4=41 \times 4 = 4 10361036 to 10391039

When an interrupt occurs during the execution of an instruction (here, INC R3), the processor completes the execution of that current instruction. The return address pushed onto the stack is the address of the next sequential instruction to be executed, which is DEC R1 starting at address 10241024.

Free practice · Your answers on this page are not saved.

Published
Report a correction
Keep exploringMore I/O Interface: Interrupt and DMA Mode questions