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Official PYQ · 2016

GATE CS 2016 Set 1 Q31 — I/O Interface: Interrupt and DMA Mode

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The size of the data count register of a DMA\text{DMA} controller is 16  bits16\;\text{bits}. The processor needs to transfer a file of 29,15429,154 kilobytes from disk to main memory. The memory is byte addressable. The minimum number of times the DMA\text{DMA} controller needs to get the control of the system bus from the processor to transfer the file from the disk to main memory is _________.
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Answer: 456

To find the minimum number of times the DMA controller needs to acquire control of the system bus, we calculate the maximum amount of data that can be transferred in a single DMA operation.

1. Maximum Transfer Size per DMA Operation:
Since the memory is byte-addressable and the data count register of the DMA controller is 16 bits16\text{ bits}, the maximum number of bytes that can be transferred in one go is: Max Bytes=216 bytes=65,536 bytes\text{Max Bytes} = 2^{16} \text{ bytes} = 65,536 \text{ bytes} Converting this to kilobytes (where 1 KB=1024 bytes1\text{ KB} = 1024\text{ bytes}): Max Transfer Size=65,5361024 KB=64 KB\text{Max Transfer Size} = \frac{65,536}{1024} \text{ KB} = 64 \text{ KB}

2. Total File Size to Transfer:
Total File Size=29,154 KB\text{Total File Size} = 29,154 \text{ KB}

3. Number of DMA Transfers Required:
Each DMA transfer requires the DMA controller to request and obtain control of the system bus once. The total number of transfers is: Number of transfers=⌈Total File SizeMax Transfer Size⌉=⌈29,154 KB64 KB⌉\text{Number of transfers} = \left\lceil \frac{\text{Total File Size}}{\text{Max Transfer Size}} \right\rceil = \left\lceil \frac{29,154 \text{ KB}}{64 \text{ KB}} \right\rceil Number of transfers=⌈455.53125⌉=456\text{Number of transfers} = \lceil 455.53125 \rceil = 456

Thus, the DMA controller needs to get control of the system bus at least 456 times.

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