GATE CS 2021 Set 1 Q53 — Instruction Pipelining

To find the total time required to execute the instructions on the pipeline, we first determine the clock cycle time ($T_{\text{clock}}$) of the pipeline.

1. Determine the Clock Cycle Time ($T_{\text{clock}}$)

The clock cycle time of a pipelined processor is determined by the delay of the slowest stage plus the register overhead (delay of the interface registers):

Given stage delays are $150, 120, 150, 160,$ and $140$ ns, and the register delay is $5$ ns:

2. Calculate Total Execution Time

For a $k$-stage pipeline executing $n$ independent instructions with no stalls, the total number of clock cycles required is:

Given:

• Number of stages ($k$) = $5$
• Number of instructions ($n$) = $100$

The total execution time ($T_{\text{total}}$) is:

Thus, the total time to execute $100$ independent instructions is 17160 nanoseconds.