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Official PYQ · 1997Q2.4I/O Interface: Interrupt and DMA ModeMCQ1 mark

GATE CS 1997 Q2.4 — I/O Interface: Interrupt and DMA Mode

Explain with AI

The correct matching for the following pairs is:

(A) DMA I/O(1) High speed RAM(B) Cache(2) Disk(C) Interrupt I/O(3) Printer(D) Condition Code Register(4) ALU\begin{array}{ll} \text{(A) DMA I/O} & \text{(1) High speed RAM} \\ \text{(B) Cache} & \text{(2) Disk} \\ \text{(C) Interrupt I/O} & \text{(3) Printer} \\ \text{(D) Condition Code Register} & \text{(4) ALU} \\ \end{array}

Choose one option
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Answer: B

We can determine the correct matching by analyzing the characteristics and typical use cases of each component:

  • (A) DMA I/O → (2) Disk: Direct Memory Access (DMA) is used for high-speed data transfer between main memory and fast peripheral devices like magnetic disks, bypassing the CPU to prevent performance bottlenecks.
  • (B) Cache → (1) High speed RAM: Cache memory is a small, extremely fast memory block placed close to the CPU, typically implemented using high-speed Static RAM (SRAM).
  • (C) Interrupt I/O → (3) Printer: Interrupt-driven I/O is highly suitable for slower devices like printers. Instead of the CPU wasting cycles waiting (polling) for the printer to become ready, the printer sends an interrupt signal to the CPU only when it requires attention.
  • (D) Condition Code Register → (4) ALU: The Condition Code Register (also known as the Status Register or Flags Register) contains flags (such as Zero, Carry, Sign, and Overflow) that are updated based on the arithmetic or logical results produced by the ALU.

Thus, the correct matching is:
A – 2, B – 1, C – 3, D – 4

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