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GATE EC question library

Practise GATE EC Electronics and Communication previous year questions free. Browse by subject, syllabus topic, year and question type, with answers and available solutions.

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Official PYQ2003Analog CircuitsDiode CircuitsMCQ · 1 mark
At 300 K300 \mathrm{~K}, for a diode current of 1 mA1 \mathrm{~mA}, a certain germanium diode requires a forward bias of 0.1435 V0.1435 \mathrm{~V}, whereas a certain silicon diode requires a forward bias of 0.178 V0.178 \mathrm{~V}. Under the conditions stated above, the closest approximation of the ratio of reverse saturation current in germanium diode to that in …
Official PYQ2003Electronic DevicesMCQ · 1 mark
A particular green LED\text{LED} emits light of wavelength 5490 A5490 \text{ A}. The energy bandgap of the semiconductor material used there is (Planck's constant = 6.626×10−34 J−s)6.626 \times 10^{-34} \mathrm{~J-s})
Official PYQ2003Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
When the gate-to-source voltage (VGS)\left(\mathrm{V}_{\mathrm{GS}}\right) of a MOSFET with threshold voltage of 400  mV400 \; \mathrm{mV}, working in saturation is 900  mV900 \; \mathrm{mV}, the drain current is observed to be 1 mA1 \mathrm{~mA}. Neglecting the channel width modulation effect and assuming that the MOSFET is operating at saturation, the drain …
Official PYQ2003Electronic DevicesMCQ · 1 mark
If P\mathrm{P} is Passivation, Q\mathrm{Q} is nn-well implant, R\mathrm{R} is metallization and SS is source/drain diffusion, then the order in which they are carried out in a standard nn-well CMOS fabrication process, is
Official PYQ2003Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
An amplifier without feedback has a voltage gain of 5050, input resistance of 1 KΩ1 \mathrm{~K} \Omega and output resistance of 2.5 KΩ2.5 \mathrm{~K} \Omega. The input resistance of the current-shunt negative feedback amplifier using the above amplifier with a feedback factor of 0.20.2 is
Official PYQ2003Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
In the amplifier circuit shown in the figure is the values of R1R_{1} and R2R_{2} are such that the transistor is operating at VCE=3 V\mathrm{V}_{\mathrm{CE}}=3 \mathrm{~V} and IC=1.5 mA\mathrm{I}_{\mathrm{C}}=1.5 \mathrm{~mA} when its β\beta is 150.150. For a transistor with β\beta of 200,200, the operating point …
Official PYQ2003Analog CircuitsOp-amp CircuitsMCQ · 1 mark
The oscillator circuit shown in the figure is has an ideal inverting amplifier. Its frequency of oscillation (in Hz\mathrm{Hz} ) is
Official PYQ2003Analog CircuitsDiode CircuitsMCQ · 1 mark
The output voltage of the regulated power supply shown in the figure is
Official PYQ2003Electronic DevicesMCQ · 1 mark
The action of a JFET\text{JFET} in its equivalent circuit can best be represented as a
Official PYQ2003Analog CircuitsOp-amp CircuitsMCQ · 1 mark
If the op-amp\text{op-amp} in the figure is idea, the output voltage Voult will be equal to
Official PYQ2003Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
Three identical amplifiers with each one having a voltage gain of 50,50, input resistance of 1 KΩ1 \mathrm{~K} \Omega and output resistance of 250  Ω250 \; \Omega, are cascaded. The open circuit voltage gain of the combined amplifier is
Official PYQ2003Networks, Signals and SystemsCircuit AnalysisMCQ · 1 mark
An ideal sawtooth voltage waveform of frequency 500 Hz500 \mathrm{~Hz} and amplitude 3 V3 \mathrm{~V} is generated by charging a capacitor of 2  μF2 \; \mu \mathrm{F} in every cycle. The charging requires
Official PYQ2003Digital CircuitsCombinatorial CircuitsMCQ · 1 mark
The circuit shown in the figure has 44 boxes each described by inputs P,Q,RP, Q, R and outputs Y,ZY, Z with Y=P⊕Q⊕RZ=RQ+PˉR+QPˉ\begin{array}{l} Y=P \oplus Q \oplus R \\ Z=R Q+\bar{P} R+Q \bar{P} \end{array} The circuit acts as a
Official PYQ2003Digital CircuitsCombinatorial CircuitsMCQ · 1 mark
If the functions W,X,YW, X, Y and ZZ are as follows W=R+PˉQ+RˉSX=PQRˉSˉ+PˉQˉRˉSˉ+PQˉRˉSˉY=RS+PR+PQˉ+Pˉ⋅Qˉ‾Z=R+S+PQ+Pˉ.Qˉ.Rˉ+PQˉ.Sˉ‾\begin{array}{l} W=R+\bar{P} Q+\bar{R} S \\ X=P Q \bar{R} \bar{S}+\bar{P} \bar{Q} \bar{R} \bar{S}+P \bar{Q} \bar{R} \bar{S} \\ Y=R S+\overline{P R+P \bar{Q}+\bar{P} \cdot \bar{Q}} \\ Z=R+S+\overline{P Q+ \bar{P} . \bar{Q} . \bar{R} + P \bar{Q} . \bar{S}} \end{array} Then
Official PYQ2003Digital CircuitsSequential CircuitsMCQ · 1 mark
A 44 bit ripple counter and a 44 bit synchronous counter are made using flip flops having a propagation delay of 10 ns10 \mathrm{~ns} each. If the worst case delay in the ripple counter and the synchronous counter be RR and SS respectively, then
Official PYQ2003Digital CircuitsCombinatorial CircuitsMCQ · 1 mark
The DTL, TTL, ECL and CMOS families of digital ICs\mathrm{IC}_{\mathrm{s}} are compared in the following 44 columns …
Official PYQ2003Analog CircuitsOp-amp CircuitsMCQ · 1 mark
The circuit shown in the figure is a 44 bit DAC\text{DAC} The input bits 00 and 11 are represented by 00 and 5 V5 \mathrm{~V} respectively. The OP AMP\text{OP AMP} is ideal, but all the resistances and the 5 V5 \mathrm{~V} inputs have a tolerance of ±10%\pm 10 \%. The specification (rounded to the nearest multiple of 5%5 \% ) for the tolerance …
Official PYQ2003Digital CircuitsCombinatorial CircuitsMCQ · 1 mark
The circuit shown in the figure converts
Official PYQ2003Digital CircuitsSemiconductor MemoriesMCQ · 1 mark
In the circuit shown in the figure A\mathrm{A} is a parallel-in, parallel-out 44 bit register, which loads at the rising edge of the clock CC. The input lines are connected to a 44 bit bus, W.W. Its output acts as the input to a 16×416 \times 4 ROM whose output is floating when the enable input EE is 0.0. A partial table of the contents of …
Official PYQ2003Digital CircuitsComputer OrganizationMCQ · 1 mark
In an 80858085 microprocessor, the instruction CMP BB has been executed while the content of the accumulator is less than that of register BB. As a result