GATE EC 2003 Set 1 Q57 — Op-amp Circuits

The circuit shown in the figure is a $4$ bit $\text{DAC}$

The input bits $0$ and $1$ are represented by $0$ and $5 \mathrm{~V}$ respectively. The $\text{OP AMP}$ is ideal, but all the resistances and the $5 \mathrm{~V}$ inputs have a tolerance of $\pm 10 \%$. The specification (rounded to the nearest multiple of $5 \%$ ) for the tolerance of the $\text{DAC}$ is