GATE EC Op-amp Circuits questions
Practise Op-amp Circuits questions for GATE EC. Explore official PYQs and original topic-wise quizzes, check answers and view available solutions. Free, no sign-in.
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The ideal circuit shown in the Figure produces output voltage when the Switch, , is open. Which of the options represents the output voltage when is closed?
A circuit using an ideal is shown in the Figure. Which of the following options gives the correct value of the current ?
Consider an ideal OP-AMP circuit as shown in the Figure. The resistances . The magnitude of the closed loop gain is . (rounded off to two decimal places)
Which of the following statements is/are TRUE with respect to an ideal opamp?
The opamps in the circuit shown are ideal, but have saturation voltages of . Assume that the initial inductor current is . The input voltage is a triangular signal with peak voltages of and time period of . Which one of the following …
In the circuit below, the opamp is ideal. If the circuit is to show sustained oscillations, the respective values of and the corresponding frequency of oscillation are
The of the circuit shown below is
An ideal circuit with a sinusoidal input is shown in the figure. The frequency is the frequency at which the magnitude of the voltage gain decreases by from the maximum value. Which of the options is/are correct?
For the following circuit with an ideal the difference between the maximum and the minimum values of the capacitor voltage is ____________.
A circuit with an ideal is shown. The Bode plot for the magnitude of the gain transfer function of the circuuit is also provided (here, is the angular frequency in ) The values of and are ________________.
Consider the circuit shown with an ideal The output voltage is ____________ (rounded off to two decimal places).
For the circuit with an ideal shown in the figure. is fixed. If volt for volt and volt for volt, where is measured across connected at the output of this , the value of is
Consider the circuit with an ideal shown in the figure. Assuming and , the condition at which equals to zero is
A circuit with an ideal is shown in the figure. A pulse of duration is applied to the input. The capacitors are initially uncharged. The output voltage of this circuit at (in integer) is ____________________ .
In the circuit shown below, all the components are ideal. If is , the current sourced by the op-amp is __________ .
For the circuit given in the figure, the voltage (in volts) across the capacitor is
An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node , connected to the negative input of the op-amp as indicated in the figure is ________.
For the operational amplifier circuit shown, the output saturation voltage are . The upper and lower threshold voltages for the circuit are,respectively,
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?
The amplifier circuit shown in the figure is implemented using a compensated operational amplifier (op-amp), and has an open-loop voltage gain, and an open-loop cut-off frequency, . The voltage gain of the amplifier at kHz, in V/V, is____________.
