GATE EC question library

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SubjectTopicYearType

A signal is sampled at

8 \; \mathrm{kHz}

and is quantized using

8

-bit uniform quantizer. Assuming

\mathrm{SNR}_q

for a sinusoidal signal, the correct statement for

P C M

signal with a bit rate of

R

The minimum number of equations required to analyze the circuit shown in the figure is

A source of angular frequency

1 \; \mathrm{rad} / \mathrm{sec}

has a source impedance consisting of

1 \Omega

resistance in series with

1 \; \mathrm{H}

inductance. The load that will obtain the maximum power transfer is

\text{RLC}

circuit has a resonance frequency of

1 \; \mathrm{kHz}

and a quality factor

\text{Q}=100

\text{R, L}

\text{C}

is doubled from its original value, the new

\text{Q}

of the circuit is

The Laplace transform of

i(t)

I(s)=\frac{2}{s(1+s)}

t \rightarrow \infty

i(t)

The differential equation for the current

i(t)

in the circuit of the figure is

n

-type silicon is obtained by doping silicon with

The bandgap of silicon at

300 \mathrm{~K}

The intrinsic carrier concentration of silicon sample at

300 \mathrm{~K}

1.5 \times 10^{16} / \mathrm{m}^3

. If after doping, the number of majority carriers is

5 \times 10^{20} / \mathrm{m}^3

, the minority carrier density is

Choose proper substitutes for

\mathrm{X}

\mathrm{Y}

to make the following statement correct Tunnel diode and Avalanche photodiode are operated in

\mathrm{X}

\mathrm{Y}

bias respectively.

n

-channel enhancement type MOSFET, if the source is connected at a higher potential than that of the bulk (i.e.

V_{SB}>0

), the threshold voltage

V_T

of the MOSFET will

Choose the correct match for input resistance of various amplifier configurations shown below

\begin{array}{ll}\text{ Configuration } & \text{ Input resistance } \\ \text{ CB: Common Base } & \text{ LO: Low } \\ \text{ CC : Common Collector } & \text{ MO: Moderate } \\ \text{ CE : Common Emitter } & \text{ HI : High }\end{array}

The circuit shown in the figure is best described as a

If the input to the ideal comparator shown in the figure is a sinusoidal signal of

8 \mathrm{~V}

(peak to peak) without any DC component, then the output of the comparator has a duty cycle of

If the differential voltage gain and the common mode voltage gain of a differential amplifier are

48 \mathrm{~dB}

2 \mathrm{~dB}

respectively, then its common mode rejection ratio is

Generally, the gain of a transistor amplifier falls at high frequencies due to the

The number of distinct Boolean expressions of

4

The minimum number of comparators required to build an

8

bit flash ADC is

The output of the

74

\text{TTL}

gates is taken from a

\text{BJT}

Without any additional circuitry, an

8: 1 \; \mathrm{MUX}

can be used to obtain