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GATE EC Op-amp Circuits questions

Practise Op-amp Circuits questions for GATE EC. Explore official PYQs and original topic-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2026Analog CircuitsOp-amp CircuitsMCQ · 1 mark
The ideal OP-AMP\text{OP-AMP} circuit shown in the Figure produces output voltage Vo=xV_{o}=x when the Switch, S\text{S}, is open. Which of the options represents the output voltage when S\text{S} is closed?
Official PYQ2026Analog CircuitsOp-amp CircuitsMCQ · 2 marks
A circuit using an ideal OP-AMP\text{OP-AMP} is shown in the Figure. Which of the following options gives the correct value of the current IXI_{X}?
Official PYQ2026Analog CircuitsOp-amp CircuitsNAT · 2 marks
Consider an ideal OP-AMP circuit as shown in the Figure. The resistances R1=R2=R3=R4=50 kΩR_{1}=R_{2}=R_{3}=R_{4}=50 \mathrm{~k} \Omega. The magnitude of the closed loop gain is ____\_\_\_\_ . (rounded off to two decimal places)
Official PYQ2025Analog CircuitsOp-amp CircuitsMSQ · 1 mark
Which of the following statements is/are TRUE with respect to an ideal opamp?
Official PYQ2024Analog CircuitsOp-amp CircuitsMCQ · 2 marks
​​​​​The opamps in the circuit shown are ideal, but have saturation voltages of ±10 V\pm 10 \mathrm{~V}. Assume that the initial inductor current is 0 A0 \mathrm{~A}. The input voltage (Vi)\left(\mathrm{V}_{\mathrm{i}}\right) is a triangular signal with peak voltages of ±2 V\pm 2 \mathrm{~V} and time period of 8μs8 \mu \mathrm{s}. Which one of the following …
Official PYQ2024Analog CircuitsOp-amp CircuitsMCQ · 2 marks
In the circuit below, the opamp is ideal. If the circuit is to show sustained oscillations, the respective values of R1R_{1} and the corresponding frequency of oscillation are
Official PYQ2023Analog CircuitsOp-amp CircuitsMCQ · 2 marks
The VOUT VIN \frac{V_{\text{OUT }}}{V_{\text{IN }}} of the circuit shown below is
Official PYQ2022Analog CircuitsOp-amp CircuitsMSQ · 1 mark
An ideal OPAMP\text{OPAMP} circuit with a sinusoidal input is shown in the figure. The 3  dB3 \; \text{dB} frequency is the frequency at which the magnitude of the voltage gain decreases by 3  dB3 \; \text{dB} from the maximum value. Which of the options is/are correct?
Official PYQ2022Analog CircuitsOp-amp CircuitsMCQ · 2 marks
For the following circuit with an ideal OPAMP,\text{OPAMP}, the difference between the maximum and the minimum values of the capacitor voltage (Vc)(V_{c}) is ____________.
Official PYQ2022Analog CircuitsOp-amp CircuitsMCQ · 2 marks
A circuit with an ideal OPAMP\text{OPAMP} is shown. The Bode plot for the magnitude (in dB)\text{(in dB)} of the gain transfer function (AV(jω)=Vout(jω)/Vin(jω))(A_{V} (j \omega) = V_{\text{out}} (j \omega) / V_{\text{in}} (j \omega)) of the circuuit is also provided (here, ω\omega is the angular frequency in rad/s.\text{rad/s}.) The values of RR and CC are ________________.
Official PYQ2022Analog CircuitsOp-amp CircuitsNAT · 2 marks
Consider the circuit shown with an ideal OPAMP.\text{OPAMP}. The output voltage V0V_{0} is ____________ VV (rounded off to two decimal places).
Official PYQ2021Analog CircuitsOp-amp CircuitsMCQ · 1 mark
For the circuit with an ideal OPAMP\text{OPAMP} shown in the figure. VREFV_{\text{REF}} is fixed. If VOUT=1V_{\text{OUT}}=1 volt for VIN−0.1V_{\text{IN}}-0.1 volt and VOUT=6V_{\text{OUT}}=6 volt for VIN=1V_{\text{IN}}=1 volt, where VOUTV_{\text{OUT}} is measured across RLR_{L} connected at the output of this OPAMP\text{OPAMP}, the value of RF/RINR_{F}/R_{\text{IN}} is
Official PYQ2021Analog CircuitsOp-amp CircuitsMCQ · 1 mark
Consider the circuit with an ideal OPAMP\text{OPAMP} shown in the figure. Assuming ∣VIN∣≪∣VCC∣\left | V_{\text{IN}} \right |\ll \left | V_{\text{CC}} \right | and ∣VREF∣≪∣VCC∣\left | V_{\text{REF}} \right |\ll \left | V_{\text{CC}} \right |, the condition at which VOUTV_{\text{OUT}} equals to zero is
Official PYQ2021Analog CircuitsOp-amp CircuitsNAT · 2 marks
A circuit with an ideal OPAMP\text{OPAMP} is shown in the figure. A pulse VINV_{\text{IN}} of 20 ms20\:ms duration is applied to the input. The capacitors are initially uncharged. The output voltage VOUTV_{\text{OUT}} of this circuit at t=0+t=0^{+} (in integer) is ____________________ VV.
Official PYQ2020Analog CircuitsOp-amp CircuitsNAT · 1 mark
In the circuit shown below, all the components are ideal. If ViV_{i} is +2 V+2\:V, the current IoI_{o} sourced by the op-amp is __________ mA\text{mA}.
Official PYQ2018Analog CircuitsOp-amp CircuitsMCQ · 2 marks
For the circuit given in the figure, the voltage VcV_{c} (in volts) across the capacitor is
Official PYQ2018Analog CircuitsOp-amp CircuitsNAT · 2 marks
An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node AA, connected to the negative input of the op-amp as indicated in the figure is ________.
Official PYQ2017Analog CircuitsOp-amp CircuitsMCQ · 1 mark
For the operational amplifier circuit shown, the output saturation voltage are ±15 V\pm 15 \:V. The upper and lower threshold voltages for the circuit are,respectively,
Official PYQ2017Analog CircuitsOp-amp CircuitsMCQ · 1 mark
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?
Official PYQ2017Analog CircuitsOp-amp CircuitsNAT · 2 marks
The amplifier circuit shown in the figure is implemented using a compensated operational amplifier (op-amp), and has an open-loop voltage gain, A0=105V/VA_{0}=10^{5}V/V and an open-loop cut-off frequency, fc=8Hzf_{c}=8Hz. The voltage gain of the amplifier at 1515 kHz, in V/V, is____________.