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Official PYQ · 2022

GATE CS 2022 Q51 — Pipeline Hazards

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A processor X1\text{X}_{1} operating at 2  GHz2 \; \text{GHz} has a standard 5−5-stage RISC\text{RISC} instruction pipeline having a base CPI (cycles per instruction)\text{CPI (cycles per instruction)} of one without any pipeline hazards. For a given program P\text{P} that has 30%30 \% branch instructions, control hazards incur 22 cycles stall for every branch. A new version of the processor X2\text{X}_{2} operating at same clock frequency has an additional branch predictor unit (BPU)\text{(BPU)} that completely eliminates stalls for correctly predicted branches. There is neither any savings nor any additional stalls for wrong predictions. There are no structural hazards and data hazards for X1\text{X}_{1} and X2.\text{X}_{2}. If the BPU\text{BPU} has a prediction accuracy of 80%,80 \%, the speed up (rounded off to two decimal places)\textit{(rounded off to two decimal places)} obtained by X2\text{X}_{2} over X1\text{X}_{1} in executing P\text{P} is _______________.
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Answer: 1.42:1.45

To find the speedup of processor X2X_2 over X1X_1, we first calculate the average Cycles Per Instruction (CPI\text{CPI}) for both processors.

1. Calculation of CPI\text{CPI} for Processor X1X_1

  • Base CPI: 11
  • Branch instruction frequency: 30%=0.330\% = 0.3
  • Stall cycles per branch: 22

CPI1=Base CPI+(Branch Frequency×Stall Cycles per Branch)\text{CPI}_1 = \text{Base CPI} + (\text{Branch Frequency} \times \text{Stall Cycles per Branch}) CPI1=1+(0.3×2)=1+0.6=1.6\text{CPI}_1 = 1 + (0.3 \times 2) = 1 + 0.6 = 1.6

2. Calculation of CPI\text{CPI} for Processor X2X_2

Processor X2X_2 uses a Branch Predictor Unit (BPU) with 80%80\% accuracy:

  • Correct prediction rate: 80%=0.880\% = 0.8 (incurs 00 stall cycles)
  • Incorrect prediction rate: 20%=0.220\% = 0.2 (incurs the standard 22 stall cycles)

The average stall cycles per branch instruction in X2X_2 is: Average Stall Cycles=(0.8×0)+(0.2×2)=0.4\text{Average Stall Cycles} = (0.8 \times 0) + (0.2 \times 2) = 0.4

Now, we calculate the average CPI\text{CPI} for X2X_2: CPI2=Base CPI+(Branch Frequency×Average Stall Cycles)\text{CPI}_2 = \text{Base CPI} + (\text{Branch Frequency} \times \text{Average Stall Cycles}) CPI2=1+(0.3×0.4)=1+0.12=1.12\text{CPI}_2 = 1 + (0.3 \times 0.4) = 1 + 0.12 = 1.12

3. Speedup Calculation

Since both processors operate at the same clock frequency (2 GHz2\text{ GHz}) and execute the same program PP (same instruction count), the speedup is given by the ratio of their CPIs:

Speedup=Execution Time of X1Execution Time of X2=CPI1CPI2\text{Speedup} = \frac{\text{Execution Time of } X_1}{\text{Execution Time of } X_2} = \frac{\text{CPI}_1}{\text{CPI}_2} Speedup=1.61.12=107≈1.42857\text{Speedup} = \frac{1.6}{1.12} = \frac{10}{7} \approx 1.42857

Rounding off to two decimal places, the speedup obtained is 1.43.

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