GATE EC BJT and MOSFET Amplifiers questions

A simplified small-signal equivalent circuit of a BJT-based amplifier is given below. The small-signal voltage gain

V_{o} / V_{S}

(in

\mathrm{V} / \mathrm{V})

is

\_\_\_\_\_\_

The ideal BJT in the circuit given below is biased in the active region with a

\beta

of

100

. If

I_{B}

is

10 \: \mu \mathrm{A}

, then

V_{C E}

(in Volts, rounded off to two decimal places) is

\_\_\_\_\_\_\_\_

.

Which of the following statements is/are TRUE with respect to ideal MOSFET-based DC-coupled single-stage amplifiers having finite load resistors?

The identical MOSFETs

M_{1}

and

M_{2}

in the circuit given below are ideal and biased in the saturation region.

\mathrm{M}_{1}

and

\mathrm{M}_{2}

have a transconductance

g_{m}

of

5

mS. The input signals (in Volts) are:

\begin{array}{l} V_{1}=2.5+0.01 \sin \omega t \\ V_{2}=2.5-0.01 \sin \omega t \end{array}

The output signal …

In the circuit shown, the identical transistors

\text{Q1}

and

\text{Q2}

are biased in the active region with

\beta=120

. The Zener diode is in the breakdown region with

\mathrm{V}_{\mathrm{Z}}=5 \mathrm{~V}

and

\mathrm{I}_{\mathrm{Z}}=25 \mathrm{~mA}

. If

\mathrm{I}_{\mathrm{L}}=12 \mathrm{~mA}

and …

In the circuit below, assume that the long channel

\text{NMOS}

transistor is biased in saturation. The small signal trans-conductance of the transistor is

g_{m}

. Neglect body effect, channel length modulation and intrinsic device capacitances. The small signal input impedance

Z_{i n}(j \omega)

is

\_\_\_\_\_\_

For the closed loop amplifier circuit shown below, the magnitude of open loop low frequency small signal voltage gain is

40

. All the transistors are biased in saturation. The current source

I_{S S}

is ideal. Neglect body effect, channel length modulation and intrinsic device capacitances. The closed loop low frequency small signal voltage gain …

In the given circuit, the current

I_{x}

(in

m A

) is

\_\_\_\_\_\_\_\_

.

Which of the following statements is/are true for a

\text{BJT}

with respect to its DC current gain

\beta

?

An

\text{NMOS}

transistor operating in the linear region has

I_{D S}

of

5 \mu \mathrm{A}

at

V_{D S}

of

0.1 \mathrm{~V}

. Keeping

V_{G S}

constant, the

V_{D S}

is increased to

1.5 \mathrm{~V}

. Given that

\mu_{n} C_{o x} \frac{W}{L}=50 \mu \mathrm{A} / \mathrm{V}^{2}

, the transconductance at the new operating point (in …

In the circuit shown below,

\text{V}_1

and

\text{V}_2

are bias voltages. Based on input and output impedances, the circuit behaves as a

Consider the

\text{CMOS}

circuit shown in the figure (substrates are connected to their respective sources). The gate width

(W)

to gate length

(L)

ratios

\left( \frac{W}{L} \right)

of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the

p\text{MOSFET},

the threshold voltage is …

The ideal long channel

n\text{MOSFET}

and

p\text{MOSFET}

devices shown in the circuits have threshold voltages of

1 \; \text{V}

and

– 1 \; \text{V},

respectively. The

\text{MOSFET}

substrates are connected to their respective sources. Ignore leakage currents and assume that the capacitors are initially discharged. For the applied voltages …

An ideal

\text{MOS}

capacitor (p-type semiconductor) is shown in the figure. The

\text{MOS}

capacitor is under strong inversion with

V_{G} = 2 \; \text{V}.

The corresponding inversion charge density

(Q_{IN})

is

2.2 \; \mu \text{C /cm}^{2}.

Assume oxide capacitance per unit area as

C_{\text{ox}} = 1.7 \; \mu \text{F/cm}^{2}.

For …

Consider an ideal long channel

n \text{MOSFET}

(enhancement-mode) with gate length

10 \; \mu \text{m}

and width

100 \; \mu \text{m}.

The product of electron mobility

(\mu_{n})

and oxide capacitance per unit area

(C_{\text{ox}})

is

\mu_{n} C_{\text{ox}} = 1 \; \text{mA/V}^{2}.

The threshold voltage of the transistor is …

Consider the circuit shown with an ideal long channel

n \text{MOSFET}

(enhancement-mode, substrate is connected to the source). The transistor is appropriately biased in the saturation region with

V_{GG}

and

V_{DD}

such that it acts as a linear amplifier.

v_{i}

is the small-signal ac input voltage.

v_{A}

and

v_{B}

represent the …

In the circuit shown in the figure, the transistors

M_{1}

and

M_{2}

are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the

\text{MOSFETs}

M_{1}

and

M_{2}

are

g_{m1}

and

g_{m2}

, respectively, and the internal resistance of the …

For an

n

-channel silicon

\text{MOSFET}

with

10\:nm

gate oxide thickness, the substrate sensitivity

\left ( \partial V_{T}/\partial \left | V_{BS} \right | \right )

is found to be

50\:mV/V

at a substrate voltage

\left | V_{BS} \right |=2V

, where

V_{T}

is the threshold voltage of the

\text{MOSFET}

. Assume that, …

For the transistor

M_{1}

in the circuit shown in the figure,

\mu_{n} C_{\text{ox}} = 100\:\mu A/V^{2}

and

(W/L)=10

, where

\mu_{n}

is the mobility of electron,

C_{\text{ox}}

is the oxide capacitance per unit area ,

W

is the width and

L

is the length. The channel length modulation coefficient is ignored. If the gate-to-source …

The base of an

\text{npn BJT T1}

has a linear doping profile

N_{B}\left ( x \right )

as shown below. The base of another

\text{npn BJT T2}

has a uniform doping

N_{B}

of

10^{17}cm^{-3}

. All other parameters are identical for both the devices. Assuming that the hole density profile is the same as that of doping, the common-emitter current …