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GATE CS Digital Logic questions

Practise Digital Logic questions for GATE CS. Explore official PYQs and original subject-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2021Digital LogicCombinational CircuitsMCQ · 1 mark
Which one of the following circuits implements the Boolean function given below? f(x,y,z)=m0+m1+m3+m4+m5+m6f(x,y,z) = m_0+m_1+m_3+m_4+m_5+m_6, where mim_i is the ithi^{\text{th}} minterm.
Official PYQ2021Digital LogicNumber Representations (Fixed and Floating Point)NAT · 1 mark
If xx and yy are two decimal digits and (0.1101)2=(0.8xy5)10(0.1101)_2 = (0.8xy5)_{10}, the decimal value of x+yx+y is ___________
Official PYQ2021Digital LogicNumber Representations (Fixed and Floating Point)MSQ · 2 marks
If the numerical value of a 22-byte unsigned integer on a little endian computer is 255255 more than that on a big endian computer, which of the following choices represent(s) the unsigned integer on a little endian computer?
Official PYQ2021Digital LogicBoolean AlgebraNAT · 2 marks
Consider a Boolean function f(w,x,y,z)f(w,x,y,z) such that f(w,0,0,z)=1f(1,x,1,z)=x+zf(w,1,y,z)=wz+y\begin{array}{lll} f(w,0,0,z) & = & 1 \\ f(1,x,1,z) & =& x+z \\ f(w,1,y,z) & = & wz +y \end{array}The number of literals in the minimal sum-of-products expression of ff is _________
Official PYQ2020Digital LogicCombinational CircuitsNAT · 1 mark
A multiplexer is placed between a group of 3232 registers and an accumulator to regulate data movement such that at any given point in time the content of only one register will move to the accumulator. The number of select lines needed for the multiplexer is ______.
Official PYQ2020Digital LogicCombinational CircuitsNAT · 1 mark
If there are mm input lines and nn output lines for a decoder that is used to uniquely address a byte addressable 11 KB RAM, then the minimum value of m+nm+n is ________ .
Official PYQ2020Digital LogicBoolean AlgebraMCQ · 2 marks
Consider the Boolean function z(a,b,c)z(a,b,c). Which one of the following minterm lists represents the circuit given above?
Official PYQ2020Digital LogicNumber Representations (Fixed and Floating Point)MCQ · 2 marks
Consider three registers R1R1, R2R2, and R3R3 that store numbers in IEEE-754\textsf{IEEE-754} single precision floating point format. Assume that R1R1 and R2R2 contain the values (in hexadecimal notation) 0x42200000\textsf{0x42200000} and 0xC1200000,\textsf{0xC1200000}, respectively. If R3=R1R2R3=\frac{R1}{R2}, what is the value stored in R3R3?
Official PYQ2019Digital LogicNumber Representations (Fixed and Floating Point)MCQ · 1 mark
In 1616-bit 22’s complement representation, the decimal number −28-28 is:
Official PYQ2019Digital LogicBoolean AlgebraMCQ · 1 mark
Which one of the following is NOT a valid identity?
Official PYQ2019Digital LogicNumber Representations (Fixed and Floating Point)MCQ · 1 mark
Consider Z=X−YZ=X-Y where X,YX, Y and Z are all in sign-magnitude form. X and Y are each represented in nn bits. To avoid overflow, the representation of ZZ would require a minimum of:
Official PYQ2019Digital LogicNumber Representations (Fixed and Floating Point)NAT · 1 mark
Two numbers are chosen independently and uniformly at random from the set {1,2,…,13}.\{1,2,\ldots,13\}. The probability (rounded off to 33 decimal places) that their 4-bit4\text{-bit} (unsigned) binary representations have the same most significant bit is ___________.
Official PYQ2019Digital LogicBoolean AlgebraMCQ · 2 marks
Consider three 44-variable functions f1,f2f_1, f_2, and f3f_3, which are expressed in sum-of-minterms as f1=Σ(0,2,5,8,14),f_1=\Sigma(0,2,5,8,14), f2=Σ(2,3,6,8,14,15),f_2=\Sigma(2,3,6,8,14,15), f3=Σ(2,7,11,14)f_3=\Sigma (2,7,11,14) For the following circuit with one AND gate and one XOR gate the output function ff can be expressed as:
Official PYQ2019Digital LogicBoolean AlgebraNAT · 2 marks
What is the minimum number of 22-input NOR gates required to implement a 44 -variable function expressed in sum-of-minterms form as f=Σ(0,2,5,7,8,10,13,15)?f=\Sigma(0,2,5,7, 8, 10, 13, 15)? Assume that all the inputs and their complements are available. Answer: _______
Official PYQ2018Digital LogicMinimization (K-Maps etc.)NAT · 2 marks
Consider the minterm list form of a Boolean function FF given below. F(P,Q,R,S)=Σm(0,2,5,7,9,11)+d(3,8,10,12,14)F(P, Q, R, S) = \Sigma m(0, 2, 5, 7, 9, 11) + d(3, 8, 10, 12, 14) Here, mm denotes a minterm and dd denotes a don't care term. The number of essential prime implicants of the function FF is ___
Official PYQ2018Digital LogicNumber Representations (Fixed and Floating Point)MCQ · 2 marks
Consider the unsigned 8-bit fixed point binary number representation, below, b7  b6  b5  b4  b3  ⋅b2  b1  b0b_7 \: \: b_6 \: \: b_5 \: \: b_4 \: \: b_3 \: \: \cdot b_2 \: \: b_1 \: \: b_0 where the position of the primary point is between b3b_3 and b2b_2 . Assume b7b_7 is the most significant bit. Some of the decimal numbers listed below cannot be represented exactly in the …
Official PYQ2018Digital LogicSequential CircuitsNAT · 1 mark
Consider the sequential circuit shown in the figure, where both flip-flops used are positive edge-triggered D\text{D} flip-flops. The number of states in the state transition diagram of this circuit that have a transition back to the same state on some value of "in" is ____
Official PYQ2018Digital LogicBoolean AlgebraMCQ · 1 mark
Let ⊕\oplus and ⊙\odot denote the Exclusive OR and Exclusive NOR operations, respectively. Which one of the following is NOT CORRECT?
Official PYQ2017Digital LogicSequential CircuitsMCQ · 1 mark
Consider a combination of T\text{T} and D\text{D} flip-flops connected as shown below. The output of the D\text{D} flip-flop is connected to the input of the T\text{T} flip-flop and the output of the T\text{T} flip-flop is connected to the input of the D\text{D} flip-flop. Initially, both Q0Q_{0} and Q1Q_{1} are set to 11 (before the …
Official PYQ2017Digital LogicMinimization (K-Maps etc.)NAT · 1 mark
Consider the Karnaugh map given below, where XX represents "don't care" and blank represents 00. Assume for all inputs (a,b,c,d)\left ( a,b,c,d \right ), the respective complements (aˉ,bˉ,cˉ,dˉ)\left ( \bar{a}, \bar{b}, \bar{c}, \bar{d} \right ) are also available. The above logic is implemented using 22-input NOR\text{NOR} gates only. The minimum number of …