Official PYQ · 2017Set 1 · Q33Sequential CircuitsMCQ1 mark

GATE CS 2017 Set 1 Q33 — Sequential Circuits

Consider a combination of $\text{T}$ and $\text{D}$ flip-flops connected as shown below. The output of the $\text{D}$ flip-flop is connected to the input of the $\text{T}$ flip-flop and the output of the $\text{T}$ flip-flop is connected to the input of the $\text{D}$ flip-flop.

Initially, both $Q_{0}$ and $Q_{1}$ are set to $1$ (before the $1^{\text{st}}$ clock cycle). The outputs

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Answer: B

Based on the circuit description:

The output of the $\text{D}$ flip-flop ( $Q_0$ ) is connected to the input of the $\text{T}$ flip-flop ( $T = Q_0$ ).
The output of the $\text{T}$ flip-flop ( $Q_1$ ) is connected to the input of the $\text{D}$ flip-flop ( $D = Q_1$ ).

The next-state equations for the flip-flops are:

Q_1(n+1) = T \oplus Q_1(n) = Q_0(n) \oplus Q_1(n)

Q_0(n+1) = D = Q_1(n)

Now, let us trace the state transitions starting from the initial state $Q_1Q_0 = 11$ :

Clock Cycle	Current State ( $Q_1 Q_0$ )	Next State ( $Q_1^+ Q_0^+$ )
Initial	$11$	$Q_1^+ = 1 \oplus 1 = 0$ , $Q_0^+ = 1 \implies \mathbf{01}$
$1^{\text{st}}$ Cycle	$01$	$Q_1^+ = 1 \oplus 0 = 1$ , $Q_0^+ = 0 \implies \mathbf{10}$
$2^{\text{nd}}$ Cycle	$10$	$Q_1^+ = 0 \oplus 1 = 1$ , $Q_0^+ = 1 \implies \mathbf{11}$
$3^{\text{rd}}$ Cycle	$11$	$Q_1^+ = 1 \oplus 1 = 0$ , $Q_0^+ = 1 \implies \mathbf{01}$
$4^{\text{th}}$ Cycle	$01$	—

Thus, after the $3^{\text{rd}}$ cycle, the state $Q_1 Q_0$ is $11$ , and after the $4^{\text{th}}$ cycle, the state $Q_1 Q_0$ is $01$ .

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Published 10 Oct 2026

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