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Official PYQ · 2011

GATE CS 2011 Q21 — Machine Instructions and Addressing Modes

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Consider a hypothetical processor with an instruction of type LW R1, 20(R2)\text{LW R1, 20(R2)}, which during execution reads a 32-bit32\text{-bit} word from memory and stores it in a 32-bit32\text{-bit} register R1\text{R1}. The effective address of the memory location is obtained by the addition of a constant 2020 and the contents of register R2\text{R2}. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?

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Answer: D

The given instruction is LW R1, 20(R2), which loads a 32-bit32\text{-bit} word from memory into register R1\text{R1}.

The effective address (EA) of the memory operand is calculated as:

EA=Contents of register R2+20\text{EA} = \text{Contents of register } \text{R2} + 20

Let us analyze the given addressing modes to find the best fit:

  • Immediate Addressing: The operand itself is specified directly within the instruction (e.g., MOV R1, #20). No memory access is involved for the operand.
  • Register Addressing: The operand is stored inside a register (e.g., ADD R1, R2). No memory access is involved.
  • Register Indirect Scaled Addressing: The effective address is calculated by scaling (multiplying by 2,4,8,2, 4, 8, etc.) the contents of an index register and adding it to a base register.
  • Base Indexed Addressing (or Displacement Addressing): The effective address is obtained by adding a constant displacement (offset) to the contents of a base/index register. Here, 2020 is the displacement and R2\text{R2} is the base register.

Therefore, the addressing mode used for the memory operand is Base Indexed Addressing.

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