GATE CS 2007 Q54 — Machine Instructions and Addressing Modes

In a simplified computer the instructions are:

$$\begin{array}{|l|l|} \hline \text{OP }R _j , R _i & \text{Perform }R _j \text{ OP } R _i \text{ and store the result in register }R _j \\ \hline \text{OP }m,R _i & \text{Perform } val\text{ OP }R _i \text{ and store the result in register }R _i \\ & val \text{ denotes the content of the memory location }m \\ \hline \text{MOV }m,R _i & \text{Moves the content of memory location }m \text{ to register }R _i \\ \hline \text{MOV }R _i,m & \text{Moves the content of register }R _i\text{ to memory location }m\\ \hline \end{array}$$

The computer has only two registers, and OP is either ADD or SUB. Consider the following basic block:

• $t_1\: = \: a+b$
• $t_2\: = \: c+d$
• $t_3\: = \: e-t_2$
• $t_4\: = \: t_1 – t_3$

Assume that all operands are initially in memory. The final value of the computation should be in memory. What is the minimum number of MOV instructions in the code generated for this basic block?