GATE EC Combinatorial Circuits questions

In the circuit shown in the Figure,

A

and

B

are logic inputs and

Y

is the logic output. Which of the following logic operations is realized by the circuit?

A Boolean function,

f(x, y, z)

with

x

as MSB and

z

as LSB is realized by

4: 1

multiplexer (MUX) with select lines,

\mathrm{S}_{1}

and

\mathrm{S}_{0}\left(\mathrm{~S}_{1}\right.

is MSB,

\mathrm{S}_{0}

is LSB) and inputs,

\mathrm{I}_{0}, \mathrm{I}_{1}, \mathrm{I}_{2}, \mathrm{I}_{3}

as shown in the Figure. Which of the …

Consider the four-variable Boolean function,

f(w, x, y, z)=\sum m(0,2,5,7,8,10,13,14,15)

with '

w

' as MSB and '

z

' as LSB. Which of the following expressions is/are the valid form(s) of

f(w, x, y, z)?

A

3

-input majority logic gate has inputs

X, Y

, and

Z

. The output

F

of the gate is logic '

1

' if two or more of the inputs are logic '

1

'. The output

F

is logic '

0

' if two or more of the inputs are logic '

0

'. Which one of the following options is a Boolean expression of the output

F

?

A full adder and an XOR gate are used to design a digital circuit with inputs

X, Y

, and

Z

, and output

F

, as shown below. The input

Z

is connected to the carry-in input of the full adder. If the input

Z

is set to logic '

l

', then the circuit functions as

\_\_\_\_\_\_\_

with

X

and

Y

as inputs.

For the Boolean function

F(A, B, C, D)=\sum m(0,2,5,7,8,10,12,13,14,15) \text{, }

the essential prime implicants are

\_\_\_\_\_\_

.

As shown in the circuit, the initial voltage across the capacitor is

10 \mathrm{~V}

, with the switch being open. The switch is then closed at

t=0

. The total energy dissipated in the ideal Zener diode

\left(V_{Z}=5 \mathrm{~V}\right)

after the switch is closed (in

\mathrm{mJ}

, rounded off to three decimal places) is

\_\_\_\_\_\_

.

A

4

-bit priority encoder has inputs

D_{3}, D_{2}, D_{1}

, and

D_{0}

in descending order of priority. The two-bit output

A B

is generated as

00,01,10

, and 11 corresponding to inputs

D_{3}, D_{2}, D_{1}

, and

D_{0}

, respectively. The Boolean expression of the output bit

B

is

\_\_\_\_\_\_\_

.

In the circuit shown below, the transistors

M_{1}

and

M_{2}

are biased in saturation. Their small signal transconductances are

g_{m 1}

and

g_{m 2}

respectively. Neglect body effect, channel length modulation and intrinsic device capacitances. Assuming that capacitor

C_{1}

is a short circuit for

\mathrm{AC}

analysis, the exact …

In the circuit shown below,

\mathrm{P}

and

\mathrm{Q}

are the inputs. The logical function realized by the circuit shown below is

Consider the

\text{2–bit}

multiplexer

\text{(MUX)}

shown in the figure. For

\text{OUTPUT}

to be the

\text{XOR}

of

\text{C}

and

\text{D},

the values for

A_{0}, A_{1}, A_{2},

and

A_{3}

are _______________.

Select the Boolean function(s) equivalent to

x+yz,

where

x, y,

and

z

are Boolean variables, and

+

denotes logical

\text{OR}

operation.

Select the correct statement(s) regarding

\text{CMOS}

implementation of

\text{NOT}

gates.

Consider a Boolean gate

\text{(D)}

where the output

Y

is related to the inputs

A

and

B

as,

Y = A + \overline{B},

where

+

denotes logical

\text{OR}

operation. The Boolean inputs

’0’

and

’1’

are also available separately. Using instances of only

\text{D}

gates and inputs

’0’

and

’1’,

_______________ (select the …

Addressing of a

32K\:\times\:16

memory is realized using a single decoder. The minimum number of

\text{AND}

gates required for the decoder is

A single crystal intrinsic semiconductor is at a temperature of

300

\text{K}

with effective density of states for holes twice that of electrons. The thermal voltage is

26

mV. The intrinsic Fermi level is shifted from mid-bandgap energy level by

The figure below shows a multiplexer where

S_{1}

and

S_{0}

are the select lines,

I_{0}

to

I_{3}

are the input data lines,

\text{EN}

is the enable line, and

\text{F(P, Q, R)}

is the output.

\text{F}

is

The band diagram of a

p

-type semiconductor with a band-gap of

1

eV is shown. Using this semiconductor, a

\text{MOS}

capacitor having

V_{TH}

of

-0.16 V

,

{C}'_{ox}

of

100\:nF/cm^{2}

and a metal work function of

3.87 \: eV

is fabricated. There is no charge within the oxide. If the voltage across the capacitor is

V_{TH}

, the …

In the circuit shown, what are the values of

F

for

EN=0

and

EN=1,

respectively?

The logic function

f(X, Y)

realized by the given circuit is