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GATE EC Circuit Analysis questions

Practise Circuit Analysis questions for GATE EC. Explore official PYQs and original topic-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2023Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
The switch S1\mathrm{S}_{1} was closed and S2\mathrm{S}_{2} was open for a long time. At t=0t=0, switch S1\mathrm{S}_{1} is opened and S2\mathrm{S}_{2} is closed, simultaneously. The value of ic(0+)\mathrm{i}_{\mathrm{c}}\left(0^{+}\right), in amperes, is
Official PYQ2023Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
The h\text{h}-parameters of a two port network are shown below. The condition for the maximum small signal voltage gain Vout Vs\frac{\mathrm{V}_{\text{out }}}{\mathrm{V}_{\mathrm{s}}} is
Official PYQ2023Networks, Signals and SystemsCircuit AnalysisNAT · 2 marks
In the circuit below, the voltage VLV_L is _________ V\mathrm{V} (rounded off to two decimal places).
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMCQ · 1 mark
The current II in the circuit shown is ______________.
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMCQ · 1 mark
Consider the circuit shown in the figure. The current II flowing through the 10  Ω10 \; \Omega resistor is _____________.
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMCQ · 1 mark
In a circuit, there is a series connection of an ideal resistor and an ideal capacitor. The conduction current (in Amperes)\text{(in Amperes)} through the resistor is 2sin⁡(t+π/2).2\sin (t+\pi/2). The displacement current (in Amperes)\text{(in Amperes)} through the capacitor is ______________.
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
For the circuit shown, the locus of the impedance Z(jω)Z (j \omega) is plotted as ω\omega increases from zero to infinity. The values of R1R_{1} and R2R_{2} are:
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
Consider the circuit shown in the figure with input V(t)V(t) in volts. The sinusoidal steady state current I(t)I(t) flowing through the circuit is shown graphically (where tt is in seconds). The circuit element ZZ can be ____________.
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisMSQ · 2 marks
Consider an FM\text{FM} broadcast that employs the pre-emphasis filter with frequency response Hpe(ω)=1+jωω0,H_{pe}(\omega) = 1 + \frac{j \omega}{\omega_{0}}, where ω0=104  rad/sec.\omega_{0} = 10^{4} \; \text{rad/sec}. For the network shown in the figure to act as a corresponding de-emphasis filter, the appropriate pair(s) of (R,C)(R,C) values is/are _____________.
Official PYQ2022Networks, Signals and SystemsCircuit AnalysisNAT · 2 marks
A linear 2-port\text{2-port} network is shown in Fig.(a).\text{Fig.(a)}. An ideal DC\text{DC} voltage source of 10  V10 \; \text{V} is connected across Port 1.1. A variable resistance RR is connected across Port 2.2. As RR is varied, the measured voltage and current at Port 22 is shown in Fig.(b)\text{Fig.(b)} as a V2V_{2} versus −I2-I_{2} plot. Note …
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisNAT · 1 mark
Consider the circuit shown in the figure. The current II flowing through the 7 Ω7\:\Omega resistor between PP and QQ (rounded off to one decimal place) is ________ AA.
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisNAT · 1 mark
Consider the circuit shown in the figure. The value of v0v_{0} (rounded off to one decimal place) is _________ VV.
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
The switch in the circuit in the figure is in position PP for a long time and then moved to position QQ at time t=0t=0. The value of dv(t)dt\dfrac{dv\left ( t \right )}{dt} at t=0+t=0^{+} is
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisMCQ · 2 marks
Consider the two-port network shown in the figure. The admittance parameters, in siemens, are
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisNAT · 2 marks
In the circuit shown in the figure, the switch is closed at time t=0t=0, while the capacitor is initially charged to −5 V-5\:V (i.e., vc(0)=−5Vv_{c}(0)=-5V). The time after which the voltage across the capacitor becomes zero (rounded off to three decimal places) is ________________ ms\text{ms}.
Official PYQ2021Networks, Signals and SystemsCircuit AnalysisNAT · 2 marks
The circuit in the figure contains a current source driving a load having an inductor and a resistor in series, with a shunt capacitor across the load. The ammeter is assumed to have zero resistance. The switch is closed at time t=0t = 0. Initially, when the switch is open, the capacitor is discharged and the ammeter reads zero ampere. After the switch is …
Official PYQ2020Networks, Signals and SystemsCircuit AnalysisMCQ · 1 mark
In the circuit shown below, the Thevenin voltage VTHV_{TH}is
Official PYQ2020Networks, Signals and SystemsCircuit AnalysisNAT · 1 mark
In the given circuit, the two-port network has the impedance matrix [Z]=[406060120]\begin{bmatrix} Z \end{bmatrix}=\begin{bmatrix} 40 & 60\\ 60& 120 \end{bmatrix}. The value of ZLZ_{L} for which maximum power is transferred to the load is _____________Ω\Omega.
Official PYQ2020Networks, Signals and SystemsCircuit AnalysisNAT · 1 mark
The current in the RL\text{RL}-circuit shown below is i(t)=10cos⁡(5t−π/4)Ai\left ( t \right )=10\cos\left ( 5t-\pi /4 \right )A. The value of the inductor (rounded off to two decimal places)\text{(rounded off to two decimal places)} is _______ H\text{H}.
Official PYQ2020Networks, Signals and SystemsCircuit AnalysisNAT · 1 mark
In the circuit shown below, all the components are ideal and the input voltage is sinusoidal. The magnitude of the steady-state output VoV_{o} ( rounded off to two decimal places) is ______ VV.