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GATE EC Analog Circuits questions

Practise Analog Circuits questions for GATE EC. Explore official PYQs and original subject-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2021Analog CircuitsOp-amp CircuitsNAT · 2 marks
A circuit with an ideal OPAMP\text{OPAMP} is shown in the figure. A pulse VINV_{\text{IN}} of 20 ms20\:ms duration is applied to the input. The capacitors are initially uncharged. The output voltage VOUTV_{\text{OUT}} of this circuit at t=0+t=0^{+} (in integer) is ____________________ VV.
Official PYQ2020Analog CircuitsOp-amp CircuitsNAT · 1 mark
In the circuit shown below, all the components are ideal. If ViV_{i} is +2 V+2\:V, the current IoI_{o} sourced by the op-amp is __________ mA\text{mA}.
Official PYQ2020Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
The base of an npn BJT T1\text{npn BJT T1} has a linear doping profile NB(x)N_{B}\left ( x \right ) as shown below. The base of another npn BJT T2\text{npn BJT T2} has a uniform doping NBN_{B} of 1017cm−310^{17}cm^{-3}. All other parameters are identical for both the devices. Assuming that the hole density profile is the same as that of doping, the common-emitter current …
Official PYQ2020Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
For the BJT\text{BJT} in the amplifier shown below, VBE=0.7V, kT/q=26 mVV_{BE}=0.7V,\:kT/q=26\:mV. Assume that BJT\text{BJT} output resistance (ro)(r_{o}) is very high and the base current is negligible. The capacitors are also assumed to be short circuited at signal frequencies. The input viv_{i} is direct coupled. The low frequency voltage gain vo/viv_{o}/v_{i} of the …
Official PYQ2020Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
In the voltage regulator shown below, V1V_{1} is the unregulated imput at 15 V15\:V. Assume VBE=0.7 VV_{BE}=0.7\:V and the base current is negligible for both the BJTs\text{BJTs}. If the regulated output VOV_{O} is 9 V9\:V, the value of R2R_{2} is ___________Ω\Omega
Official PYQ2019Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
In the circuits shown the threshold voltage of each nMOS\text{nMOS} transistor is 0.6 V.0.6\:V. Ignoring the effect of channel length modulation and body bias. the values of Vout1\text{Vout}1 and Vout2,\text{Vout} 2, respectively, in volts, are
Official PYQ2018Analog CircuitsDiode CircuitsMCQ · 2 marks
A 2×22\times 2 ROM array is built with the help of diodes as shown in the circuit below. Here W0W0 and W1W1 are signals that select the word lines and B0B0 and B1B1 are signals that are output of the sense amps based on the stored data corresponding to the bit lines during the read operation. …
Official PYQ2018Analog CircuitsBJT and MOSFET AmplifiersMCQ · 2 marks
The distance (in meters) a wave has to propagate in a medium having a skin depth of 0.1 m0.1\:m so that the amplitude of the wave attenuates by 20 dB20\:dB, is
Official PYQ2018Analog CircuitsOp-amp CircuitsMCQ · 2 marks
For the circuit given in the figure, the voltage VcV_{c} (in volts) across the capacitor is
Official PYQ2018Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
For the circuit given in the figure, the magnitude of the loop current (in amperes, correct to three decimal places) 0.50.5 second after closing the switch is _______.
Official PYQ2018Analog CircuitsDiode CircuitsNAT · 2 marks
A dcdc current of 26 μA26\:\mu A flows through the circuit shown. The diode in the circuit is forward biased and it has an ideality factor of one. At the quiescent point, the diode has a junction capacitance of 0.5 nF0.5\:nF. Its neutral region resistances can be neglected. Assume that the room temperature thermal equivalent voltage is 26 mV26\:mV. For …
Official PYQ2018Analog CircuitsOp-amp CircuitsNAT · 2 marks
An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node AA, connected to the negative input of the op-amp as indicated in the figure is ________.
Official PYQ2018Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
In the circuit shown below, the (W/L)(W/L) value for M2M_{2} is twice that for M1M_{1}. The two nMOS\text{nMOS} transistors are otherwise identical. The threshold voltage VTV_{T} for both transistors is 1.0 V1.0\:V. Note that VGSV_{GS} for M2M_{2} must be >1.0 V> 1.0\:V. Current through the nMOS\text{nMOS} transistors can be modeled as …
Official PYQ2017Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
For a narrow base PNP BJT , the excess minority carrier concentrations(ΔnE\Delta n_{E} for emitter,ΔpB\Delta p_{B} for base ,Δnc\Delta n_{c} for collector) normalized to equilibrium minority carrier concentrations(nE0n_{E0} for emitter, , ΔpB0\Delta p_{B0} for base ,ΔnC0\Delta n_{C0} for collector) in the quasi-neutral emitter,base and collector regions …
Official PYQ2017Analog CircuitsOp-amp CircuitsMCQ · 1 mark
For the operational amplifier circuit shown, the output saturation voltage are ±15 V\pm 15 \:V. The upper and lower threshold voltages for the circuit are,respectively,
Official PYQ2017Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
A good transconductance amplifier should have
Official PYQ2017Analog CircuitsBJT and MOSFET AmplifiersMCQ · 1 mark
The Miller effect in the context of a Common Emitter amplifier explains
Official PYQ2017Analog CircuitsOp-amp CircuitsMCQ · 1 mark
Which of the following can be the pole-zero configuration of a phase-lag controller (lag compensator)?
Official PYQ2017Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
In the circuit shown, the voltage VIN(t)V_{IN}(t) is described by: VIN(t)={0,for t<015Voltsfor t≥0V_{IN}(t)=\begin{cases} 0, & \text{for } t< 0 \\ 15 \text{Volts} & \text{for } t\geq 0 \end{cases} where tt is in seconds. The time (in seconds) at which the current II in the circuit will reach the value 22 Amperes is ___________.
Official PYQ2017Analog CircuitsBJT and MOSFET AmplifiersNAT · 2 marks
In the figure shown, the npnnpn transistor acts as a switch. For the input Vin(t)V_{in}(t) as shown in the figure, the transistor switches between the cut-off and saturation regions of operation, when TT is large. Assume collector-to-emitter voltage at saturation VCE(sat)=0.2VV_{CE(sat)}=0.2V and base-to-emitter voltage VBE=0.7VV_{BE}=0.7V.The minimum value of the …