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GATE CS Machine Instructions and Addressing Modes questions

Practise Machine Instructions and Addressing Modes questions for GATE CS. Explore official PYQs and original topic-wise quizzes, check answers and view available solutions. Free, no sign-in.

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Official PYQ2000Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
To put the 8085 microprocessor in the wait state
Official PYQ1999Computer Organization and ArchitectureMachine Instructions and Addressing ModesMSQ · 1 mark
The main difference(s) between a CISC and a RISC processor is/are that a RISC processor typically
Official PYQ1999Computer Organization and ArchitectureMachine Instructions and Addressing ModesMSQ · 1 mark
A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features cannot be implemented on this processor?
Official PYQ1998Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
The address space of 80868086 CPU is
Official PYQ1998Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
Which of the following addressing modes permits relocation without any change whatsoever in the code?
Official PYQ1996Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
Relative mode of addressing is most relevant to writing:
Official PYQ1995Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
Which of the following statements is true?
Official PYQ1994Computer Organization and ArchitectureMachine Instructions and Addressing ModesNAT · 1 mark
State True or False with one line explanation Expanding opcode instruction formats are commonly employed in RISC. (Reduced Instruction Set Computers) machines.
Official PYQ1992Computer Organization and ArchitectureMachine Instructions and Addressing ModesNAT · 1 mark
In an 1111-bit computer instruction format, the size of address field is 44-bits. The computer uses expanding OP code technique and has 55 two-address instructions and 3232 one-address instructions. The number of zero-address instructions it can support is ________
Official PYQ1990Computer Organization and ArchitectureMachine Instructions and Addressing ModesNAT · 1 mark
State whether the following statements are TRUE or FALSE with reason: The flags are affected when conditional CALL or JUMP instructions are executed.
Official PYQ1987Computer Organization and ArchitectureMachine Instructions and Addressing ModesMCQ · 1 mark
The most relevant addressing mode to write position-independent codes is: