GATE CS 2025 Set 2 Q29 — Memory Hierarchy: Cache, Main Memory and Secondary Storage

To find the sizes of the main memory and the cache memory, we analyze the fields of the physical address in a direct-mapped cache system.

1. Physical Address Format

For a direct-mapped cache, the physical address is divided into three fields:

$$\text{Physical Address} = \text{Tag} + \text{Index} + \text{Block Offset}$$

2. Calculating the Fields

• Block Offset: The system is byte-addressable, and the size of each cache block is $1$ byte. $$\text{Block Offset bits} = \log_2(\text{Block Size}) = \log_2(1) = 0 \text{ bits}$$
• Index Field: Given as $12$ bits (used to select/index the cache block).
• Tag Field: Given as $4$ bits.

3. Main Memory Size

The total number of bits in the physical address is:

$$\text{Physical Address Size} = 4 \text{ (Tag)} + 12 \text{ (Index)} + 0 \text{ (Block Offset)} = 16 \text{ bits}$$

Since the system is byte-addressable, the Main Memory size is:

$$\text{Main Memory Size} = 2^{16} \text{ bytes} = 64 \text{ KB}$$

4. Cache Memory Size

The number of lines (or blocks) in the cache is determined by the index bits:

$$\text{Number of Cache Lines} = 2^{12} = 4096$$

The cache memory size (data capacity) is:

$$\text{Cache Size} = \text{Number of Cache Lines} \times \text{Block Size} = 4096 \times 1 \text{ byte} = 4 \text{ KB}$$

Thus, the main memory size is $64$ KB and the cache memory size is $4$ KB, which corresponds to Option A.