The size of the physical address space of a processor is bytes. The capacity of a cache memory unit is bytes. The cache block size is bytes. The cache memory unit can be built as a direct mapped cache or as a -way set-associative cache, where and . Let the length of the TAG field be bits for the direct mapped cache, and bits for the set-associative cache.
Which one of the following options is true?
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Answer: A
To find the relationship between the TAG field lengths and , we analyze the address division for both direct-mapped and -way set-associative cache configurations.
1. Given Parameters
- Physical Address Space: bytes Physical Address (PA) length = bits.
- Cache Capacity: bytes.
- Block Size: bytes = bytes Block Offset = bits.
- Total Cache Blocks: blocks.
2. Direct-Mapped Cache
In a direct-mapped cache, each block in the cache corresponds to a unique index.
- Number of Index Bits: bits.
- TAG Bits ():
3. -Way Set-Associative Cache
Here, the cache is divided into sets, where each set contains blocks.
- Number of Sets: sets.
- Number of Set Index Bits: bits.
- TAG Bits ():
4. Relationship Between and
Substituting into the expression for :
Thus, the correct option is A.
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