A computer has a -, 4-way set associative, write back data cache with block size of . The processor sends addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, valid bits, modified bit and replacement bit.
The size of the cache tag directory is:
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Answer: A
To find the size of the cache tag directory, we need to calculate the number of blocks in the cache, the tag size for each block, and then the total bits required for all entries.
Step 1: Calculate the number of cache blocks (lines)
Step 2: Calculate the number of sets
Since the cache is 4-way set associative:
Step 3: Determine the address bit division
The processor uses a 32-bit address. We divide the address into Tag, Set Index, and Block Offset fields:
- Block Offset: bits
- Set Index: bits
- Tag: bits
Step 4: Calculate the size of each tag directory entry
Each entry in the tag directory corresponds to one cache block and contains:
- Address tag: bits
- Valid bits: bits
- Modified bit: bit
- Replacement bit: bit
Step 5: Calculate the total tag directory size
Since there is one entry per cache block:
Converting to Kbits ():
Therefore, the correct option is A.
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