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Official PYQ · 1996

GATE CS 1996 Q2.22 — Combinational Circuits

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Consider the circuit in figure. ff implements

Choose one option
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Answer: C

The given circuit is a standard 4-to-1 multiplexer (MUX) with select lines AA (MSB) and BB (LSB), and the following input lines:

  • I0=CI_0 = C
  • I1=C‾I_1 = \overline{C}
  • I2=C‾I_2 = \overline{C}
  • I3=CI_3 = C

The output equation for a 4-to-1 multiplexer is given by:

f=A‾B‾I0+A‾BI1+AB‾I2+ABI3f = \overline{A}\overline{B}I_0 + \overline{A}BI_1 + A\overline{B}I_2 + ABI_3

Substituting the given inputs into the equation:

f=A‾B‾(C)+A‾B(C‾)+AB‾(C‾)+AB(C)f = \overline{A}\overline{B}(C) + \overline{A}B(\overline{C}) + A\overline{B}(\overline{C}) + AB(C)

This is the sum-of-minterms expansion for the 3-variable XOR operation:

f=∑m(1,2,4,7)=A⊕B⊕Cf = \sum m(1, 2, 4, 7) = A \oplus B \oplus C

Thus, the circuit implements the 3-input XOR gate, which corresponds to Option C.

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