GATE CS 1995 Q2.2 — Combinational Circuits

To determine the number of address and data lines required for a memory unit of size $4\text{K} \times 16$:

1. Address Lines: The memory has $4\text{K}$ words. Since $1\text{K} = 2^{10}$, we have:$$\text{Number of words} = 4 \times 2^{10} = 2^2 \times 2^{10} = 2^{12}$$To uniquely address $2^{12}$ memory locations, the number of address lines required is:$$\log_2(2^{12}) = 12 \text{ lines}$$
2. Data Lines: The word size of the memory is $16$ bits, which means each memory location stores $16$ bits of data. To transfer a complete word in parallel, we need:$$\text{Number of data lines} = 16 \text{ lines}$$

Thus, the memory unit requires 12 address lines and 16 data lines, which corresponds to option (C).