GATE CS 2011 Q50 — Sequential Circuits

To find the state of the counter after the next clock edge, we first determine the input equations for each D flip-flop from the circuit diagram:

• Flip-flop P: The input $D_P$ is driven by an XNOR gate with inputs $Q$ and $R$:
  $$D_P = \overline{Q \oplus R}$$
• Flip-flop Q: The input $D_Q$ is driven by an XOR gate with inputs $P$ and $Q$:
  $$D_Q = P \oplus Q$$
• Flip-flop R: The input $D_R$ is driven by an XOR gate with inputs $Q$ and $R$:
  $$D_R = Q \oplus R$$

Given the initial state prior to the clock edge is $P = 0$, $Q = 1$, and $R = 0$, we compute the next state values:

• $P_{\text{next}} = D_P = \overline{1 \oplus 0} = 0$
• $Q_{\text{next}} = D_Q = 0 \oplus 1 = 1$
• $R_{\text{next}} = D_R = 1 \oplus 0 = 1$

Thus, the value of $PQR$ after the clock edge is $011$.