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GATE CS 2009 Q29 — Memory Hierarchy: Cache, Main Memory and Secondary Storage

Explain with AI

Consider a 44-way set associative cache (initially empty) with total 1616 cache blocks. The main memory consists of 256256 blocks and the request for memory blocks are in the following order:

0,255,1,4,3,8,133,159,216,129,63,8,48,32,73,92,155.0, 255, 1, 4, 3, 8, 133, 159, 216, 129, 63, 8, 48, 32, 73, 92, 155.

Which one of the following memory block will NOT be in cache if LRU replacement policy is used?

Choose one option
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Answer: D

The cache is 44-way set associative with 1616 blocks. Therefore, the number of sets is:

Number of Sets=164=4(indexed as 0,1,2,3)\text{Number of Sets} = \frac{16}{4} = 4 \quad (\text{indexed as } 0, 1, 2, 3)

Each memory block BB maps to a set using the formula: Set=B(mod4)\text{Set} = B \pmod 4.

Let us trace the LRU queue for Set 0 (where blocks 0,4,8,216,48,32,920, 4, 8, 216, 48, 32, 92 map) since the options 88 and 216216 map here:

  1. Request 0: Set 0 →[0]\rightarrow [0]
  2. Request 4: Set 0 →[0,4]\rightarrow [0, 4]
  3. Request 8: Set 0 →[0,4,8]\rightarrow [0, 4, 8]
  4. Request 216: Set 0 →[0,4,8,216]\rightarrow [0, 4, 8, 216] (Set is now full)
  5. Request 8 (Hit): Set 0 →[0,4,216,8]\rightarrow [0, 4, 216, 8] (8 becomes MRU)
  6. Request 48 (Miss): Replace LRU block 00 →[4,216,8,48]\rightarrow [4, 216, 8, 48]
  7. Request 32 (Miss): Replace LRU block 44 →[216,8,48,32]\rightarrow [216, 8, 48, 32]
  8. Request 92 (Miss): Replace LRU block 216216 →[8,48,32,92]\rightarrow [8, 48, 32, 92]

At the end of the sequence, block 216216 is evicted from the cache. Tracing Set 1 and Set 3 shows that blocks 33 and 129129 remain in the cache.

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