GATE EC BJT and MOSFET Amplifiers questions

In the three dimensional view of a silicon n-channel MOS transistor shown below, $\delta=20\:nm$. The transistor is of width $1\: \mu m$. The depletion width formed at every p-n junction is $10\:nm$. The relative permittivities of $Si$ and $SiO_2$, respectively, are $11.7$ and $3.9$, and $\varepsilon_0=8.9 \times 10^{-12} \: F/m$. The …

The phenomenon known as "Early Effect" in a bipolar transistor refers to a reduction of the effective base-width caused by

An $n$-channel depletion MOSFET has following two points on its $\mathrm{I}_\text{D}-\mathrm{V}_{\text{GS}}$ curve $\text{V}_{\text{Gs}}=0$ at $\text{I}_\text{D}=12 \mathrm{~mA}$ and $\mathrm{V}_{\mathrm{GS}}=-6$ Volts at $\mathrm{I}_{\mathrm{D}}=0$ Which of the following $\text{Q}$-points will give the highest trans-conductance gain for small …

Common Data for Questions 71, 72,73: In the transistor amplifier circuit shown in the figure below, the transistor has the following parameters: $$\beta_{\mathrm{DC}}=60, \mathrm{~V}_{\mathrm{BE}}=0.7 \mathrm{~V}, h_{n^{c}} \longrightarrow \infty, h_{f \times} \longrightarrow \infty$$ The capacitance $\mathrm{C}_{\text{c }}$ can be assumed to be infinite. …

Common Data for Questions 71, 72,73: In the transistor amplifier circuit shown in the figure below, the transistor has the following parameters: $$\beta_{\mathrm{DC}}=60, \mathrm{~V}_{\mathrm{BE}}=0.7 \mathrm{~V}, h_{n^{c}} \longrightarrow \infty, h_{f c} \longrightarrow \infty$$ The capacitance $\mathrm{C}_{\text{c }}$ can be assumed to be infinite. In …

Common Data for Questions 71, 72,73: In the transistor amplifier circuit shown in the figure below, the transistor has the following parameters: $$\beta_{\mathrm{DC}}=60, \mathrm{~V}_{\mathrm{BE}}=0.7 \mathrm{~V}, h_{n^{c}} \longrightarrow \infty, h_{f c} \longrightarrow \infty$$ The capacitance $\mathrm{C}_{\text{c }}$ can be assumed to be infinite. In …

The cascode amplifier is a multistage configuration of

For an $\text{npn}$ transistor connected as shown in the figure, $V_{B E}=0.7$ volts. Given that reverse saturation current of the junction at room temperature $300^{\circ} \mathrm{K}$ is $10^{-13} \mathrm{~A}$, the emitter current is

In an ideal differential amplifier shown in the figure, a large value of $\left(R_{E}\right)$.

For an $n$-channel $\text{MOSFET}$ and its transfer curve shown in the figure, the threshold voltage is

The circuit using a $\text{BJT}$ with $\beta=50$ and $\mathrm{V}_{\mathrm{BE}}=0.7 \mathrm{~V}$ is shown in the figure. The base current $\mathrm{I}_{\mathrm{B}}$ and collector voltage $\mathrm{V}_{\mathrm{C}}$ are respectively

The transistors used in a portion of the TTL gate shown in the figure have a $\beta=100$. The base-emitter voltage of is $0.7 \mathrm{~V}$ for a transistor in active region and $0.75 \mathrm{~V}$ for a transistor in saturation. If the sink current $I=1 \mathrm{~mA}$ and the output is at logic $0,$ then the current $I_{R}$ will be equal to

Both transistors $\mathrm{T} 1$ and $\mathrm{T} 2$ show in the figure, have a threshold voltage of $1$ Volts. The device parameters $\mathrm{K}_1$ and $\mathrm{K}_2$ of $\mathrm{T} 1$ and $\mathrm{T} 2$ are, respectively, $36 \; \mu \mathrm{A/V}^{2}$ and $9 \; \mu \mathrm{A} / \mathrm{V}^{2}$. The output voltage $V_{0}$ is

A $\text{MOS}$ capacitor made using $p$ type substrate is in the accumulation mode. The dominant charge in the channel is due to the presence of

Common Data Questions 78, 79, 80 Given, $r_{d}=20 \; \mathrm{k} \Omega, \mathrm{I}_{\mathrm{DSS}}=10 \mathrm{~mA}, \mathrm{~V}_{p}=-8 \mathrm{~V}$ $Z_1$ and $Z_0$ of the circuit are respectively

Common Data Questions 78, 79, 80 Given, $r_{d}=20 \; \mathrm{k} \Omega, \mathrm{I}_{\mathrm{DSS}}=10 \mathrm{~mA}, \mathrm{~V}_{p}=-8 \mathrm{~V}$ $\mathrm{I}_{\mathrm{D}}$ and $\mathrm{V}_{\mathrm{DS}}$ under $\mathrm{DC}$ conditions are respectively

Common Data Questions 78, 79, 80 Given, $r_{d}=20 \; \mathrm{k} \Omega, \mathrm{I}_{\mathrm{DSS}}=10 \mathrm{~mA}, \mathrm{~V}_{p}=-8 \mathrm{~V}$ Transconductance in milli-Siemens (mS) and voltage gain of the amplifier are respectively

The impurity commonly used for realizing the base region of a silicon $n-p-n$ transistor is

If for a silicon $n-p-n$ transistor, the base-to-emitter voltage $\left(\mathrm{V}_{\mathrm{KE}}\right)$ is $0.7 \mathrm{~V}$ and the collector-to-base voltage $\left(\mathrm{V}_{\text{CB}}\right)$ is $0.2 \mathrm{~V}$, then the transistor is operating in the

Consider the following statements $\mathrm{S} 1$ and $\mathrm{S} 2$. $\text{S1 :}$ The $\beta$ of a bipolar transistor reduces if the base width is increased. $\text{S2 :}$ The $\beta$ of a bipolar transistor increases if the doping concentration in the base is increased. Which one of the following is correct?