GATE EC Digital Circuits questions

Given figure is the voltage transfer characteristic of

The minimum number of $2$-to-$1$ multiplexers required to realize a $4$-to $1$ mulitiplexer is

The Boolean expression $\text{AC + B} \overline{\text{C}}$ is equivalent to

$11001, 1001$ and $111001$ correspond to the $2$'s complement representation of which one of the following sets of number ?

The $8255$ Programmable Peripheral Interface is used as described below. An A/D converter is interfaced to a microprocessor through $8255.$ The conversion is initiated by a signal from the $8255$ on Port C. A signal on Port C causes data to be strobed into Port A. Two computers exchange data using a pair of $8255 \mathrm{s}$. Port A works as a …

The number of memory cycles required to execute the following $8085$ instructions $\text{LDA 3000 H}$ $\text{LXI D, FOF 1 H}$ would be

In the modulo-$6$ ripple counter shown in the given figure, the output of the $2$-input gate is used to clear the J-K flip-flops. The $2$-input gate is

Consider the sequence of $8085$ instructions given below. $\text{LXI H, 9258, MOV A, M, CMA, MOV M, A}$ Which one of the following is performed by this sequence?

A Boolean function $f$ of two variables $x$ and $y$ is defined as follows: $$f(0,0)=f(0,1)=f(1,1)=1 ; \quad f(1,0)=0$$ Assuming complements of $x$ and $y$ are not available, a minimum cost solution for realizing $f$ using only $2$-input NOR gates and $2$-input OR gates (each having unit cost) would have a total cost of

It is desired to multiply the numbers $0 \mathrm{AH}$ by $0 \mathrm{BH}$ and store the result in the accumulator. The numbers are available in registers $B$ and $C$ respectively. A Part of the $8085$ program for this purpose is given below: $\qquad \qquad \text{MV1 A, 00H}$ $\text{Loop;}…....……….….$ $\qquad.…...…….....….$ …

The number of distinct Boolean expressions of $4$ variables is

The minimum number of comparators required to build an $8$ bit flash ADC is

The output of the $74$ series of $\text{TTL}$ gates is taken from a $\text{BJT}$ in

Without any additional circuitry, an $8: 1 \; \mathrm{MUX}$ can be used to obtain

A $0$ to $6$ counter consists of $3$ flip flops and a combination circuit of $2$ input gate(s). The combination circuit consists of

The circuit shown in the figure has $4$ boxes each described by inputs $P, Q, R$ and outputs $Y, Z$ with $$\begin{array}{l} Y=P \oplus Q \oplus R \\ Z=R Q+\bar{P} R+Q \bar{P} \end{array}$$ The circuit acts as a

If the functions $W, X, Y$ and $Z$ are as follows $$\begin{array}{l} W=R+\bar{P} Q+\bar{R} S \\ X=P Q \bar{R} \bar{S}+\bar{P} \bar{Q} \bar{R} \bar{S}+P \bar{Q} \bar{R} \bar{S} \\ Y=R S+\overline{P R+P \bar{Q}+\bar{P} \cdot \bar{Q}} \\ Z=R+S+\overline{P Q+ \bar{P} . \bar{Q} . \bar{R} + P \bar{Q} . \bar{S}} \end{array}$$ Then

A $4$ bit ripple counter and a $4$ bit synchronous counter are made using flip flops having a propagation delay of $10 \mathrm{~ns}$ each. If the worst case delay in the ripple counter and the synchronous counter be $R$ and $S$ respectively, then

The DTL, TTL, ECL and CMOS families of digital $\mathrm{IC}_{\mathrm{s}}$ are compared in the following $4$ columns …

The circuit shown in the figure converts