GATE EC Analog Circuits questions

An ideal opamp has voltage sources $V_1, V_3, V_5, \dots, V_{N-1}$ connected to the non-inverting input and $V_2, V_4, V_6, \dots, V_N$ connected to the inverting input as shown in the figure below $(+V_{CC}= 15$ volt, $– V_{CC} = – 15$ volt). The voltages $V_1, V_2, V_3, V_4, V_5, V_6, \dots$ are $1, -1/2, 1/3, -1/4, 1/5, -1/6, \dots$ volt, …

In the circuit shown below, $V_{s}$ is a constant voltage source and $I_{L}$ is a constant current load. The value of $I_{L}$ that maximizes the power absorbed by the constant current load is

The switch has been in position $1$ for a long time and abruptly changes to position $2$ at $t = 0$. If time $t$ is in seconds, the capacitor voltage $V_{C}$ (in volts) for $t > 0$ is given by

The Ebers-Moll model of a $BJT$ is valid

A long-channel $NMOS$ transistor is biased in the linear region with $V_{DS}=50$ $m$ $V$ and is used as a resistance. Which one of the following statement is $NOT$ correct?

Which one of the following statements is correct about an ac-coupled common-emitter amplifier operating in the mid-band region?

Consider a long-channel $NMOS$ transistor with source and body connected together. Assume that the electron mobility is independent of $V_{GS}$ and $V_{DS}.$ Given, $g_{m}=0.5\mu A/V \text{ for } V_{DS}=50\:mV \text{ and } \: V_{GS}= 2 \: V$, $g_{d}=8\mu A/V \text{ for } V_{GS}=2\:V \text{ and }V_{DS}=0 \:V$, where …

An opamp has a finite open loop voltage gain of $100$. Its input offset voltage $V_{ios}(=+5mV)$ is modeled as shown in the circuit below. The amplifier is ideal in all other respects. $V_{\text{input}}$ is $25 \: mV$. The output voltage (in millivolts) is _________

In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s^{2}+2s \right )}$. The step response of the closed-loop system should have minimum settling time and have no overshoot. The required value of gain $k$ to achieve this is __________

In the feedback system shown below $G\left ( s \right )=\frac{1}{\left ( s+1 \right )\left (s+2 \right )\left ( s+3 \right )}.$ The positive value of $k$ for which the gain margin of the loop is exactly $0$ dB and the phase margin of the loop is exactly zero degree is _________

Consider the circuit shown in the figure. Assuming $V_{EE1} = V_{EE2} = 0.7$ volt, the value of the dc voltage $V_{C2}$(in volt) is _______

In the astable multivibrator circuit shown in the figure, the frequency of oscillation (in kHz) at the output pin $3$ is _______

For a superheterodyne receiver, the intermediate frequency is $15\ MHz$ and the local oscillator frequency is $3.5\ GHz$. If the frequency of the received signal is greater than the local oscillator frequency, then the image frequency (in $MHz$) is _______

The injected excess electron concentration profile in the base region of an $npn$ BJT, biased in the active region, is linear, as shown in the figure. If the area of the emitter-base junction is $0.001\:cm^2 ,\mu_n=800cm^2/(V-s)$ in the base region and depletion layer widths are negligible, then the collector current $I_c$(in mA) at room temperature is …

In the circuit shown in the figure , the channel length modulation of all transistors is non-zero $(\lambda\neq0)$. Also, all transistors operate in saturation and have negligible body effect .The ac small signal voltage gain ($V_o/V_{in}$) of the circuit is _________

For the circuit with ideal diodes shown in the figure, the shape of the output $v_{\text{out}}$ for the given sine wave input $v_{\text{in}}$ will be

A MOSFET in saturation has a drain current of $1$ mA for $V_{DS} =0.5 \: V$. If the channel length modulation coefficient is $0.05 \: V^{-1}$, the output resistance (in $k \Omega$) of the MOSFET is ___________.

For the NMOSFET in the circuit shown, the threshold voltage is $V_{th}$, where $V_{th}>0$. The source voltage $V_{SS}$ is varied from $0$ to $V_{DD}$. Neglecting the channel length modulation, the drain current $I_D$ as a function of $V_{SS}$ is represented by

In the circuit shown, assume that the opamp is ideal. The bridge output voltage $V_0$ (in mV) for $\delta=0.05$ is __________

The circuit shown in the figure has an ideal opamp. The oscillation frequency and the condition to sustain the oscillations, respectively, are