GATE EC Digital Circuits questions
Practise Digital Circuits questions for GATE EC. Explore official PYQs and original subject-wise quizzes, check answers and view available solutions. Free, no sign-in.
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A memory system of size bytes is required to be designed using memory chips which have address lines and data lines each. The number of such chips required to design the memory system is
A - bit with a full scale output voltage of is designed to have accuracy. If the is calibrated at and the operating temperature ranges from to , then the maximum net temperature …
A dynamic cell which hold has to be refreshed every secs, so that the stored voltage does not fall by more than . If the cell has a constant discharge current of , the storage capacitance of the cell is
The signal to quantisation noise ratio in an -bit system
If the number of bits per sample in a system is increased from improvement in signal-to quantisation noise ratio will be
An 'Assembler' for a microprocessor is used for
A transfer implies
An latch is a
The minimum number of transistors required to make a dynamic cell is
When a is interrupted, it
A switch-tail ring counter is made by using a single flip-flop. The resulting circuit is a
The minimum number of gates required to implement the Boolean function , is equal to
The output of the circuit in the figure is equal to
A dynamic consists of
A can be used
The output of a logic gate is ‘’ when all its inputs are at logic ‘’. Then gate is either
Data can be changed from spatial code to temporal code and vice-versa by using
's complement representation of a – bit number (one sign bit and magnitude bits) is . Its magnitude in decimal representation is
In a microprocessor, the register which holds the address of the next instruction to be fetched is
Dual-slope integration type Analog-to-digital converters provide
