GATE EC Digital Circuits questions

The Boolean expression $(X+Y)(X+\overline{Y}) + \overline{(X\;\overline{Y}) + \overline{X}}$ simplifies to

Five JK flip-flops are cascaded to form the circuit shown in Figure. Clock pulses at a frequency of $1\: MHz$ are applied as shown. The frequency $(\text{in}\:kHz)$ of the waveform at $Q3$ is ________.

The output $F$ in the digital logic circuit shown in the figure is

Consider the Boolean function $F(w,x,y,z) = wy + xy + \overline{w}\:xyz + \overline{w}\:\overline{x}\:y + xz + \overline{x}\:\overline{y}\:\overline{z}.$ Which one of the following is the complete set of essential prime implicants?

The digital logic shown in the figure satisfies the given state diagram when $Q1$ is connected to input $A$ of the XOR gate. Suppose the XOR gate is replaced by an XNOR gate. Which one of the following options preserves the state diagram?

For an $n$-variable Boolean function, the maximum number of prime implicants is

The number of bytes required to represent the decimal number $1856357$ in packed BCD (Binary Coded Decimal) form is ___________.

In a half-subtractor circuit with $X$ and $Y$ as inputs, the Borrow $(M)$ and Difference $(N = X – Y)$ are given by

As FIR system is described by the system function $$H(z) = 1 + \frac{7}{2} z^{-1} + \frac{3}{2}z^{-2}$$. The system is

The outputs of the two flip-flops $Q1$, $Q2$ in the figure shown are initialized to $0,0$. The sequence generated at $Q1$ upon application of clock signal is

For the $8085$ microprocessor, the interfacing circuit to input $8$-bit digital data $( DI_{0}-DI_{7})$ from an external device is shown in the figure. The instruction for correct data transfer is

The circuit shown in the figure is a

Consider the multiplexer based logic circuit shown in the figure. Which one of the following Boolean functions is realized by the circuit?

If WL is the Word Line and BL the Bit Line, an SRAM cell is shown in

In the circuit shown, $W$ and $Y$ are MSBs of the control inputs. The output $F$ is given by

If $X$ and $Y$ are inputs and the Difference $(D=X-Y)$ and the Borrow $(B)$ are the outputs, which one of the following diagrams implements a half-subtractor?

A region shown below contains a perfect conducting half-space and air. The surface current $\overrightarrow{K_{s}}$ on the surface of the perfect conductor is $\overrightarrow{K_{s}}= \hat{x}2$ amperes per meter. The tangential $\overrightarrow{H}$ field in the air just above the perfect conductor is

For a given sample-and-hold circuit, if the value of the hold capacitor is increased, then

In the circuit shown in the figure, if $C=0$, the expression for $Y$ is

The output $(Y)$ of the circuit shown in the figure is