Assume that in a certain computer, the virtual addresses are bits long and the physical addresses are bits long. The memory is word addressible. The page size is kB and the word size is bytes. The Translation Look-aside Buffer (TLB) in the address translation path has valid entries. At most how many distinct virtual addresses can be translated without any TLB miss?
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Answer: B
To find the maximum number of distinct virtual addresses that can be translated without a TLB miss, we need to determine how many addressable units (words) can be mapped by the TLB entries simultaneously.
Step 1: Calculate the number of addresses per page
We are given:
- Memory addressing: Word-addressable
- Word size:
- Page size:
Since the memory is word-addressable, each distinct address refers to one word. Therefore, the number of distinct virtual addresses (words) in a single page is:
Step 2: Calculate the total addresses mapped by the TLB
The TLB has valid entries. Each entry maps exactly one virtual page to a physical page frame.
Thus, the maximum number of distinct virtual addresses that can be translated without a TLB miss is:
Step 3: Match with the options
Let's simplify the options to find the match for :
- Option A:
- Option B:
- Option C:
- Option D:
This matches Option B.
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