GATE EC question library

The particular solution of the initial value problem given below is $$\frac{d^2y}{dx^2}+12\frac{dy}{dx}+36y=0\hspace{0.3cm} \text{ with } \hspace{0.3cm}y(0)=3\hspace{0.3cm} \text{ and }\hspace{0.3cm} \frac{dy}{dx} \bigg| _{x=0} =-36$$

If the vectors $e_1=(1,0,2)$, $e_2=(0,1,0)$ and $e_3=(-2,0,1)$ form an orthogonal basis of the three-dimensional real space $\mathbb{R}^3$, then the vector $\textbf{u}=(4,3,-3)\in \mathbb{R}^3$ can be expressed as

A triangle in the $xy$-plane is bounded by the straight lines $2x=3y, \: y=0$ and $x=3$. The volume above the triangle and under the plane $x+y+z=6$ is _______

The values of the integral $\large\frac{1}{2\pi j}\oint_c\frac{e^z}{(z-2)} \small dz$ along a closed contour $c$ in anti-clockwise direction for the point $z_0=2$ inside the contour $c$, and the point $z_0=2$ outside the contour $c$, respectively,are

A signal $2 \cos(\frac{2\pi}{3}t)-\cos(\pi t)$ is the input to an LTI system with the transfer function $$H(s)=e^s+e^{-s}.$$ If $C_k$ denotes the $k^{th}$ coefficient in the exponential Fourier series of the output signal, then $C_3$ is equal to

The ROC (region of convergence) of the $z$-transform of a discrete-time signal is represented by the shaded region in the $z$-plane. If the signal $x[n]=(2.0)^{\mid n\mid},-\infty<n<+\infty$, then the ROC of its $z$-transform is represented by

Assume that the circuit in the figure has reached the steady state before time $t = 0$ when the $3\;\Omega$ resistor suddenly burns out, resulting in an open circuit. The current $i(t)$ (in ampere) at $t=0^+$ is _______

In the figure shown, the current $i$ (in ampere) is _________

The $z$-parameter matrix $\begin{bmatrix} z_{11} &z_{12}\\ z_{21} &z_{22} \end{bmatrix}$ for the two-port network shown is

A continuous-time speech signal $x_a(t)$ is sampled at a rate of $8\:kHz$ and the samples are subsequently grouped in blocks, each of size $N$. The DFT of each block is to be computed in real time using the radix-$2$ decimation-in-frequency FFT algorithm. If the processor performs all operations sequentially, and takes $20\:\mu s$ for computing …

The direct form structure of an FIR (finite impulse response) filter is shown in the figure. The filter can be used to approximate a

The injected excess electron concentration profile in the base region of an $npn$ BJT, biased in the active region, is linear, as shown in the figure. If the area of the emitter-base junction is $0.001\:cm^2 ,\mu_n=800cm^2/(V-s)$ in the base region and depletion layer widths are negligible, then the collector current $I_c$(in mA) at room temperature is …

Figures I and II show two MOS capacitors of unit area. The capacitor in Figure I has insulator materials $X$ (of thickness $t_1 = 1$ nm and dielectric constant $\varepsilon_1=4$) and $Y$ (of thickness $t_2 = 3$ nm and dielectric constant $\varepsilon_2 = 20$). The capacitor in Figure II has only insulator material $X$ of thickness $t_{Eq}$. …

The $I-V$ characteristics of the zener diodes $D1\:\text{and}\:D2$ are shown in Figure I. These diodes are used in the circuit given in Figure II. If the supply voltage is varied from $0$ to $100$ V,then breakdown occurs in

For the circuit shown in the figure, $R_1=R_2=R_3=1\;\Omega,\;L=1\:\mu H$ and $C=1\:\mu F$. If the input $V_{in}=\cos(10^6t)$, then the overall voltage gain $(V_{out}/V_{in})$ of the circuit is _________

In the circuit shown in the figure , the channel length modulation of all transistors is non-zero $(\lambda\neq0)$. Also, all transistors operate in saturation and have negligible body effect .The ac small signal voltage gain ($V_o/V_{in}$) of the circuit is _________

In the circuit shown in the figure, transistor $M1$ is in saturation and has transconductance $g_m = 0.01$ siemens. Ignoring internal parasitic capacitances and assuming the channel length modulation $\lambda$ to be zero,the small signal input pole frequency (in $kHz$) is _________

Following is the K-map of a Boolean function of five variables $P,Q,R,S$ and $X$. The minimum sum-of-product (SOP) expression for the function is

For the circuit shown in the figure, the delays of NOR gates, multiplexers and inverters are $2$ ns, $1.5$ ns and $1$ ns, respectively. If all the inputs $P, Q, R, S$ and $T$ are applied at the same time instant, the maximum propagation delay (in ns) of the circuit is _________

For the circuit shown in the figure, the delay of the bubbled NAND gate is $2\:ns$ and that of the counter is assumed to be zero. If the clock (Clk) frequency is $1\:GHz$, then the counter behaves as a