GATE EC Computer Organization questions

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Track address sizes, cache organisation and pipeline dependencies carefully. Write down the units and assumptions before computing memory access times or processor performance.

18 on this page

SubjectTopicYearType

In an

8085

microprocessor, the instruction CMP

B

has been executed while the content of the accumulator is less than that of register

B

. As a result

Consider the following assembly language program. …

8085

microprocessor based system uses a

4 \mathrm{K} \times 8 \text{bit RAM}

whose starting address is

\text{AA00 H}

. The address of the last byte in this

\text{RAM}

In the

8085

microprocessor, the

\text{RST6}

instruction transfers the program execution to the following location:

The number of hardware interrupts (which require an external signal to interrupt) present in an

8085

microprocessor are

The contents of Register

\text{(B)}

and Accumulator

\text{(A)}

8085

microprocessor are

49 \mathrm{H}

and

3 \mathrm{AH}

respectively. The contents of

\mathrm{A}

and the slatus of carry flag

(C Y)

and sign flag

(S)

after executing

\text{SUB B}

instructions are

\text{CS}=\text{A}_{15} \; \text{ A}_{14} \; \text{A}_{13}

is used as the chip select logic of a

4 \; \text{K RAM}

in an

8085

system, then its memory range will be

An instruction used to set the carry Flag in a computer can be classified as

\text{I/O}

processor control the flow of information between

In an

8085 \; \mu \; \mathrm{P}

system, the

\text{RST}

instruction will cause an interrupt

The following insturctions have been executed by an

8085 \; \mu \mathrm{P}

\begin{array}{cl}\text{ ADDRESS (HEX) } & \text{ INSTRUCTION } \\ 6010 & \text{ LXI H, 8A } 79 \mathrm{H} \\ 6013 & \text{ MOV A, L } \\ 6015 & \text{ ADDH } \\ 6016 & \text{ DAA } \\ 6017 & \text{ MOV H, A } \\ 6018 & \text{ PCHL }\end{array}

From …

The total number of memory accesses involved (inclusive of the

op

– code fetch) when an

8085

processor executes the instruction

\text{LDA}

2003

The following sequence of instructions are executed by an

8085

microprocessor:

\begin{matrix} 1000 &LXI & SP &27 \; FF \\ 1000 &CALL & & 1006\\ 1006 &POP \; H & & \end{matrix}

The contents of the stack pointer

\text{(SP)}

and the

\text{HL,}

An 'Assembler' for a microprocessor is used for

\text{‘DMA'}

transfer implies

When a

\text{CPU}

is interrupted, it

In a microprocessor, the register which holds the address of the next instruction to be fetched is

In an

8085

microprocessor system with memory mapped

\text{I} / \mathrm{O}