GATE EC 2026 Set 1 Q32 — Computer Organization

A machine has a $32$-bit architecture with $1$-word long instructions. It has $24$ registers and supports an instruction set of size $40$. Each instruction has five distinct fields, namely opcode, two source register identifiers, one destination register identifier, and an immediate value. Assuming that the immediate operand is an unsigned integer, …

The content of the registers are $R_{1} = 25H, R_{2} = 30H$ and $R_{3} = 40H$. The following machine instructions are executed. $\text{PUSH } \{R_{1}\}$ $\text{PUSH } \{R_{2}\}$ $\text{PUSH } \{R_{3}\}$ $\text{POP } \{R_{1}\}$ $\text{POP } \{R_{2}\}$ $\text{POP } \{R_{3}\}$ After execution, the content of registers $R_{1},\:R_{2},\:R_{3}$ …

In an $8085$ microprocessor, the number of address lines required to access a $16$ K byte memory bank is ____________ .

The clock frequency of an $8085$ microprocessor is $5$ MHz . If the time required to execute an instruction is $1.4 \: \mu s$, then the number of T-states needed for executing the instruction is

The following FIVE instructions were executed on an $8085$ microprocessor. MVI A, $33$H MVI B, $78$H ADD B CMA ANI $32$H The Accumulator value immediately after the execution of the fifth instruction is

In an $8085$ system, a PUSH operation requires more clock cycles than a POP operation. Which one of the following options is the correct reason for this?