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Official PYQ · 1993

GATE EC 1993 Set 1 Q6.15 — Digital Communications

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A pulse train with a frequency of 1  MHz1 \; \mathrm{MHz} is counted using a modulo 10241024 ripple-counter built with JK\text{JK} flip flops. For proper operation of the counter, the maximum permissible propagation delay per flip flop stage is …nSec\dots n \mathrm{Sec}.
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Answer: 100:100

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