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Official PYQ · 2005

GATE CS 2005 Q19 — I/O Scheduling

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 Which one of the following is true for a CPU having a single interrupt request line and a single interrupt grant line?

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Answer: C

Both vectored interrupts and multiple interrupting devices are possible even with a single interrupt request line and a single interrupt grant line by using a daisy-chaining configuration:

  1. Multiple Interrupting Devices: Multiple devices can share a single interrupt request line using a wired-OR connection. Any device wishing to interrupt pulls the common request line low (or high, depending on active state).
  2. Vectored Interrupts: When the CPU acknowledges the interrupt via the single interrupt grant line, the grant signal propagates serially through the devices (daisy chain). The interrupting device closest to the CPU intercepts this grant signal, stops its propagation, and places its unique interrupt vector (address of its ISR) onto the system data bus. The CPU then reads this vector to jump to the correct service routine.

Thus, both multiple interrupting devices and vectored interrupts are fully supported under this scheme.

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